Sw project with TE063X-Reference-Designs

[Fabrizio]

Hi,
I am beginning to work with TE0630 USB and with associated reference design, but I have problem to construct a project in SDK with reference design sw files. I have noticed that there is not a workspace already setted (like in reference design for xilinx board for exaple). I have worked with previous version of edk where you could manage sw projects in edk only.
I have exported hw from EDK 13.2 and I have generated Bsp. If I generate a project with xilinx wizard is all ok, but when I try to import project from sw/demo directory I have problem with setting: for example I have not toolchain setted and make file is not ok. Des it exist a datailed procedure step by step to construct demo project with all setting needed?
Thanks,
Fabrizio

[Oleksandr Kiyenko]

Hi Fabrizio,
To import project to SDK you have to do several steps:
1) Create BSP. Select standalone type.
2) Add repository. "Xilinx Tools -> Repositories" you have to select path to TE-EDK-IP folder (should be 1 step up from project). After that press "Rescan Repositories"
3) Open BSP Settings, go to drivers and select corresponding drivers for custom cores (xps_fx2 xps_i2c_slave xps_npi_dma)
4) Create new C project
5) Import to C project source files from sw\src
6) Build project

I going to add SDK folder to reference project soon, but it's not 100% solution because xilinx use absolute path to repositories, so it have to be changed to build project.

Regards
Alex

[Oleksandr Kiyenko]

Hi Fabrizio,
I just update github repository with exported software parts.
You can get it from https://github.com/Trenz-Electronic/TE063X-Reference-Designs/downloads
In README.txt brief instruction for software part configuration.

Regards

[Fabrizio]

Hi Alexander,
thank you for your post.
I will try.
Fabrizio

[Fabrizio]

Hi Alex,
I am trying to do steps reported in your post. I have restarted all.
0) I have opened reference design with XPS and exported hardware in SDK
1) I have created a BSP standalone from File->New->Xilinx Board Support Package
2) I have added a repository (in my case is "C:\Xilinx\TE063X-Reference-Designs\TE-EDK-IP") and I have performed a rescan operation
3) I open BSP settings and now is possible assign a driver name to custom core, then build library operation is completed successfully
4) I create a new Xilinx C project. When I perform step 4 (new C project) what type of template must I choose? I choose empty project and I have assigned
it the existing BSP. Project named  "test" is created.
5) I have imported project demo (with File->Import->General->File System), and build is performed. Project explorer windows is reported in sdk2.jpg file. Build seems to be performed correctly, but fails elfcheck operation (console windows is reported in sdk3.jpg). I have checked lscript.ld file, and address and range of sections seems to be correct. Probably I am missing some correct settings.
I have read readme.txt file updated, and I have seen that steps are slightly different. I have tried but in this manner I have not a correct build.
I have received yesterday TE0630 and carrier board to perform tests.
Regards,
Fabrizio

[Oleksandr Kiyenko]

Hi Fabrizio!
You did all right except C project. At last step (when you already have configured hardware platform and BSP) you can create project by importing files as you did, but you forget to import linker script "lscript.ld" file. So as result your project was built with some "default" settings and fails. You can try to import lscript.ld file and rebuild project.
Other simpler way it's import whole project. You can:
- remove demo project (and  BSP if you want)
- download latest project from github and unzip it to some temporary location
- in SDK right click at left panel and select "Import->General->Existing project into Workspace"
- select path to sw folder in temporaty location
- select demo project (and BSP if needed)
- build project

Regards

[Fabrizio]

Hi Alex,
thanks for your quickly post!
I am slightly surprised to know that importing entire folder I have not imported linker script "lscript.ld" file. In project explorer folder file is correct. I have looked in sdk help and in xilinx forum but I haven't found how import an *.sd file or a single *.c file. Do you know how import an *.ld file? Now I will try to import demo project form latest download with "Existing project in Workspace" as said in your post.
Regards,
Fabrizio

[Fabrizio]

Hi Alex,
I have tried to import from latest donwload but I get same problem. I have discovered the reason: hardware platform has DDR3 mapped at 0x4000000 (from system.xml - I have verified on XPS too...), but linker script has DDR3 base address mapped at 0x1C000000. I have modified linker script and elfcheck error is missed.
Some question: I have not modified original setting in XPS, do you know how there is this address issue? When Trenz Electronic has tested reference design, DDR3 base address used was 0x40000000 or 0x1C000000?
Regards,
Fabrizio

[Oleksandr Kiyenko]

Hi Fabrizio,
Test was done by elf file generated in EDK 12.4. Will do some tests with new SDK project to be sure that it generate correct elf file.

Regards

[Oleksandr Kiyenko]

Hi Fabrizio,
It was side effect of 12.4 -> 13.2 migration. Linker script should be regenerated to make it works.
I attach new linker script (additional ".txt" extension should be removed)  which works ok, I just test it on
hardware. Will update download area and repository soon.

Regards

[Fabrizio]

Hi Alex,
thank you for your post.
I'll test all on hardware next week, and will report you the result.
Regards,
Fabrizio

[Fabrizio]

Hi Alex,
I am trying to test reference design, but I have download issues. I suppose a problem in my ISE 13.2 and SDK installation. I would try with ISE 12.4, where I have more experience. Is it available old reference design for ISE 12.x version?
Regards,

Fabrizio

[Oleksandr Kiyenko]

Hi Fabrizio,
Unfortunately I don't have 12.4 anymore and complete project also gone. But I have xmp and mhs files from
12.4 project, so you can easily downgrade your 13.2 project to 12.4 by replacing system.xmp and system.mhs files
by attached.
Which download problems you have ?

Regards

[Fabrizio]

Hi Alex,
thanks for files.
Problem is that sometimes download is not starting, and when is starting it doesn't complete. I think that I have an EDK 13.2 installation not correct.
I need to speedup feasibility analysis, for this reason I need to downgrade project to ISE 12.x version and so I don't need to use SDK but only EDK. I have downgraded project with some work. During this process I had an NGBUILD error, because rx_fifo.ngc and tx_fifo_ngc was not generated. For overcome this problem I have copied rx_fifo.ngc and tx_fifo.ngc  in "TE063X-Reference-Designs\reference-TE0630\implementation\xps_fx2_0_wrapper" directory, because these files are not generated from XPS. I have seen that ise project for rx_fifo and tx_fifo is present only for xps_fx2_v1_30_a, and not for version 1.50b, last used. Probably because this is not changed, is it correct? When I try to open xps_fx2.xise file I see that several files are missing, then I cannot regenerate rx_fifo and tx_fifo.ngc files. More I see that for these IP was used core generator with FIFO generator 4.2, but in ISE 12.2 there is FIFO generator 6.2. In final I have an important question: are complete projects of all custom IP developed available? I need to know this for evaluate to start project.

Regards,
Fabrizio

[Oleksandr Kiyenko]

Hi Fabrizio
ngc files for tx_fifo and rx_fifo is generated by pcores\xps_fx2_v1_50_b\data\xps_fx2_v2_1_0.tcl and should be in "implementation\xps_fx2_0_wrapper" after "Generate netlist" (I just check it for clear project). Project you see it's remainder from old versions and not used to generation. Put ngc files to core directory it's not solution, because this core used for spartan-3 and spartan-6 architectures and possible may be used for others so should be regenerated each time. Unfortunately I can't check how tcl file from 1.50.b work at ISE 12.4.
So I see solutions:
1) use older versions of fx2 core 1.30.a
2) generate ngc files for fifo manually and put it to netlist filder + create bdd file
I don't really understand what do you mean by "complete projects". Custom IPs was created as part of the reference project, not as a standalone projects.
If you need coregen files for rx_fifo and tx_fifo, I can send it to you.

Regards,
Alex

[Fabrizio]

Hi Alex,
I agree with you that copying ngc files is not a solution. I think that something doesn't work in tcl file with ISE 12.4. I will investigate in log files. What is difference about fx2 core 1.30a and 1.50a e 1.50b version? For "complete projects" I mean coregen files, please can you send me this files? Now I am testing project with SDK and ISE 13.2. I don't know how perform tx and rx tests. For example I don't know if after select 'r' or 't'  I should push 's', and what utility must I use on PC host.  Does it exist a document that explain this?
Regards,

Fabrizio

[Oleksandr Kiyenko]

Hi Fabrizio,
1.30a it's old version with bigger FX2->FPGA transfer speed, but it's not stable on some FX2 chips (it's critical mode for FX2)
1.50a initial release of stable version (little slower, but works on all FX2 chips)
1.50b minor changes and Spartan-6 support
As for tests, at test program (for example TE0320_API_Example.exe) you should do:
1) Press "1" to check if driver see USB module (it should print "1" as number of connected modules)
2) Press "2" to connect to the module
3) Press "w" to start PC->FX2->FPGA test (it fill RAM with pattern from PC and check it)
4) Press "r" to start FPGA->FX2->PC test (it will transfer data from RAM to PC and check)
so "w" test should be done before "r" to have filled RAM.

Here https://www.yousendit.com/download/TEhWcHBNR3NlM1N2eE1UQw you can get  directory with generated ngc files and other coregen staff.

Regards

[Fabrizio]

Hi Alex,
for work with TE0320_API_Example.exe what Fx2 driver is it right? Generic Cypress Driver (Cyusb.sys) or Trenz (TE_USB_FX2_32.sys)?
Regards,
Fabrizio

[Oleksandr Kiyenko]

Hi Fabrizio,
Driver to use is depend on
- FX2 firmware (If you see DEWesoft in name of USB device - you have old version (version2) if you see "TE USB FX2" you have new (version3))
TE0320_API_Example.exe - use DLL for version2 and require old driver
With version3 you have to use new driver from http://www.trenz-electronic.de/download/d0/Trenz_Electronic/d1/TE-USB-Suite/d2/drivers/d3/version_3.html and some Sample Application from https://github.com/Trenz-Electronic/TE-USB-Suite

Regards

[Fabrizio]

Hi Alex,
if I power up board with switch S1A off device put VID 04B4 PID 8613, that is VID and PID of FX2 not programmed. When I power up with S1A on I get VID 0547 and PID 1002 which corresponds at Ver2 DEWesoft with old pid and vid, then I have installed correct usb driver. w and r test are working ok. Fpga program is running in debug mode from SDK ( I have reinstalled Platform cable usb and my download issues are missed....). All is working good. For work with FX2 firmware compiled on my machine, I have modified source code of FX2 ver 3 restoring VID and PID at 0547 and 1002 instead of 0BD0 and 0x0300, because installation of new driver fails. So I have used same TE0320_API_Example.exe application and same old driver, and tests seem to be correct. Is it all correct for you?
Regards,
Fabrizio

[Oleksandr Kiyenko]

Hi Fabrizio
You did all right, only note that there was no need to recompile FX2 firmware for old VID PID - there should be already compiled binary for old VID&PID in repository (actually thre is only difference in last firmware release). You can work with old driver if you wish, but if you need Windows 7 or/and 64 bit support you have to install new driver.

Regards

[Fabrizio]

Hi Alex,
I have added an xps_gpio and a function in software to move some output pin. I have problem with breakpoint. In this function I put a bkp inside a cicle for. When I pass more then one time in this bkp program execution enter in a while cicle inside an Assert instruction. After is impossible to restart debug of application. Do you know any Eclipse setting or compiler/linker switch for this issue? Do you have seen this behaviour in your development project? I have not modifyied setting of original project.
Regards,
Fabrizio

[Oleksandr Kiyenko]

Hi Fabrizio,
I did't saw such behavior in my practice. Actually I don't like debug with breakpoints and use it only in very difficult cases.

Regards,
Alex

[Hengist]

The release of the third generation Trenz Electronic USB FX2 Suite made this post obsolete. Please access current documentation and resources here: TE USB FX2 Suite.