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TE0715 Multi-SPI

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benwefers:
Hi there!

Competent computer programmer here, but newbie with FPGA and Xilinx stuff. I have been tasked with updating an old version of some code for a TE0715-05-51I33-L board. Essentially all it did was run Petalinux with a command line program (written in C) that used three different SPI modules.

These were setup in Xilinx like so:


--- Code: ---MISO: JB1.55(FMC_LA11_N)(H17), JM1.56, B13_L10_P(Y12)
CLK: JB1.56(FMC_LA4_N)(H11), JM1.55, B13_L9_P(AB13)
MOSI: JB1.58(FMC_LA4_P)(H10), JM1.57, B13_L9_N(AB14)
CS1: JB1.57(FMC_LA11_P)(H16), JM1.58, B13_L10_N(Y13)
CS2: JB1.60(FMC_CLK0_N)(H5), JM1.59, B13_L12_N(Y15)
CS3: JB1.59(FMC_LA12_N)(G16), JM1.60, B13_L23_P(V16)
CS4: JB1.62(?????) (???), JM1.61, B13_L12_P(Y14)
--- End code ---


And:


--- Code: ---&spi1 {
  is-decoded-cs = <0>;
  num-cs = <3>;
  status = "okay";
  spidev@0x00 {
    compatible = "spidev";
    spi-max-frequency = <50000000>;
    reg = <0>;
  };
  spidev@0x01 {
    compatible = "spidev";
    spi-max-frequency = <50000000>;
    reg = <1>;
  };
  spidev@0x02 {
    compatible = "spidev";
    spi-max-frequency = <50000000>;
    reg = <2>;
  };
};
--- End code ---

... along with a number of other configurations. When this project was given to me, I was told that it is only possible to run 3 SPI channels this way, and that in order to add a fourth it would be necessary to do something different, like set a register containing the value of the CS (1 - 4) in the PL and use that to control the four chip select wires. I am still grinding my way through getting a functioning programming environment working, the previous person was using Vivado and Petalinux 2020.2 with this example project ( https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0715/Reference_Design/2020.2/test_board ) as the starting point.

My question then is, once I get my environment up and running, how should I go about this? Is it true that I cannot simply add a value for CS4 (and if so what value?) and similarly add a spidev@0x03? Any tips to help me tackle this is appreciated. Thanks!

benwefers:
So as an update, it seems the best approach for my original problem is just using GPIO to control the 4 chip selects. But now I have encountered a different problem.

I got a new board to test with and just to make sure the hardware was functioning correctly I flashed it over QSPI with an old Petalinux BOOT.bin that I have flashed on another board a dozen times. It flashed successfully, the Petalinux booted up just fine and everything worked as expected. I then attempted to flash it with a new version I created but immediately got an error "unrecognized JEDEC id bytes: 00, 00, 00". I then tried to flash it with the original version that I know works, but get the same error, though sometimes the numbers will change slightly.

Petalinux boots up fine still with the firmware I first flashed it with but it seems I have no way of changing it. With the other board I was able to reflash it over and over again with no issues, though that one was given to me so maybe something had been changed on it? Any ideas why this may be and how can I fix it?

Thanks.

Waldi3141:
Hi,
by "i got a new board" you mean a new TE0715 module ? or carrier?
Are you using a custom carrier?
And do i understand correctly, that youre not able anymore to program the QSPI flash even with our latest reference design 2021.2 ? (But it worked once with the old Boot.bin?)
https://wiki.trenz-electronic.de/display/PD/TE0715+Test+Board

regards
Waldemar

benwefers:
Hi Waldemar!

Sorry, I should have added more details. By new board yes I mean Trenz module, that I opened myself from a sealed Trenz static bag. The previous one I had been working on was handed to me (same module) already opened and programmed before. We are using a custom carrier that communicates through an FTDI, but again this carrier has worked well, and I did test on another carrier board to make sure mine wasn't faulty and got the same results.

And yes. I successfully flashed it once with the old BOOT.bin (which is basically just the 2020.2 reference design with SPI channels added), but now I can't flash it with anything else.

I just downloaded the prebuilt version of the 2021.2 reference and tried to flash that but got the same error. Perhaps I am doing something wrong?

Here are the steps I took:
- Launch Vivado
- Open Hardware Manager
- Autoconnect
- Right click on xc7z015_1 and select Add Configuration Memory Device
- Add s25fl256s-3.3v-qspi-x4-single
- Select BOOT.bin
- Select fsbl_flash.elf
- Set address range to Configuration File Only
- Program

Thanks again for your help and let me know if there's any other info I can provide.

Waldi3141:
Thanks for detailed description.

Instead of manually choosing the Flash device in the hardware manager, you can simply insert the command "TE::pr_program_flash -swapp u-boot" in the TCl console to automatically program the flash when using out reference design environment. (describe under the section Lauch -> QSPI boot mode here: https://wiki.trenz-electronic.de/display/PD/TE0715+Test+Board)

Unfortunately the person who works with these devices is on vacation atm, so i can just guess what might be the problem.

Did you try to program the latest firmware onto the CPLD? -> https://wiki.trenz-electronic.de/display/PD/TE0715+CPLD+Firmware
Otherwise ... try to program the QSPI flash with the same vivado version with which the last successful flashing took place, in your case 2020.2 ( if not installed, Vivado Lab version is enough to program the qspi)

good luck :)

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