Trenz Electronic Products > Trenz Electronic FPGA Modules

TE0820 Custom Carrier DisplayPort Implementation

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mer:
Using TEBF0808 as a reference I noticed that the the DPAUX signals (OE, HPD, AUX_IN, AUX_OUT) are routed to one of the CPLDs. I'm assuming this is because these signals are 3.3V and the CPLD is essentially serving as a level shifter to 1.8V since all MIO are 1.8V on the carrier. Would it be appropriate to use a SN74A type level shifter instead? Should I remove the resistors (R40, R41) from HPD? Any other considerations? Thank you.

Vitali:
Hi,
TEBF0808 is the carrier board for TE0803/TE0807/TE0808. If you are using the TE0820 micromodule, the MIO Bank501 is connected to 3.3V and you don't need to use a level translator. The HPD signal should be pulled down by at least 100k and you can remove the resistors R40, R41 in your project.

mer:
Oops, messed up the title. Making a custom carrier for TE0808 so MIO is all 1.8V.

Vitali:
If you don't like using a CPLD, you can use a level translator as an alternative.

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