PLL clock input on TE803 with TEBF0808

[NFB]

Hi,

I have a TE803 (TE0803-03-2BE11-A) with a TEBF0808 (rev 4A). Looking at the respective TRMs, each of these modules has a Si5338 PLL. I was entertaining the plan to feed a clock coming from an FMC board I am developing into an unused input on one of these PLLs to produce a synced clock signal from it (yes, I could do this on the FPGA fabric but the jitter is worse).   

However, after some more careful reading of the TRM and looking at the schematics it seems that this may not be done.

Looking at the TE803 TRM (https://wiki.trenz-electronic.de/display/PD/TE0803+TRM), it seems that IN1/2 are connected to B2B J2-4/J2-6. However, looking at the TEBF0808 schematic, these pins are not routed, rendering this input useless.

Looking at the TEBF0808 TRM (https://wiki.trenz-electronic.de/display/PD/TEBF0808+TRM#TEBF0808TRM-ProgrammablePLLClockGenerator), the PLL inputs IN1/2 are connected to B2B J2-7/9. However, once again, looking at the TE803 schematic, these B2B connector pins are not routed, rendering this input useless as well.

Could you please confirm these findings? Is there a particular reason why this was done?

Is there any foreseeable way that I am missing of passing a clock input into any of these PLLs?

Thank you.

[JH]

Hi,
unfortunately it's correct, that you can't use FMCGBTCLK from FMC connector for TE0803 modules:
https://wiki.trenz-electronic.de/display/PD/5.2+x+7.6+Carriers#id-5.2x7.6Carriers--CarrierforUltraSoM+(4xSS5B2B)

You must configure SI5338 on power up with your need clks (we add the procedure to the FSBL code on our reference designs) and generade reference clks PL MGTs.

br
John

[NFB]

Thank you John,

Actually, my question was a bit different. I understand that I cannot use the FMCGBTCLK from the FMC connector, as the TE803 does not have the GT banks that they would be connected to.
My goal was to be able to pass a clock I receive on the FMC board into the Si5338 that is stuffed on the TEBF0808 (even if I had to route them through the FPGA). I could still carry the clock signal through one of the several GC pins that are routed to the FMC and then pass this clock to the PLL. However, even if the input clock channel of the Si5338 (mounted on the TEBF0808) is routed to the B2B connector, the connection on the TE803 side does not exist. I imagine that this is not the case for other (larger) modules.

It's a pity since this makes the PLL just standing there with a hanging input.

It would save me the trouble of adding in my own PLL into the FMC daughterboard (specially with the ongoing part shortage).

But I appreciate the clarification (and confirmation of my suspicion).

Best,
NFB

 

[JH]

Hi,
sorry, I've overseen that you use assembly variant without MGTs on PL side.

When you use TEBF0808 carrier, the SI5338 (this one on the TE0803 module, schematic page 25 component U5), can only used with the onboard  25MHz oscillator which is connected IN3 of the PLL. So you can generate different CLKs, like we do it in our reference designs

The same happens with the SI5338 on the TEBF0808 carrier, when you use TE0803 module.

TEBF0808 was original design for TE0808 which has bigger SoC with more IOs. TE0803 is smaller version, so not all periphery is connected on this combination of carrier and module.

So at the end you can't use external reference CLK for SI5338 on the TE0803/TEBF0808 combination. This is only possible when you create an custom carrier.

br
John