Hi
We have been using the TE0722 for R&D and have managed to operate the system as need by programming over vitis. We however, need to now send the electronics we have developed to a customer for them to evaluate the system performance and hence need to flash our program to the zynq.
I removed the DDR check as per this post (
https://wiki.trenz-electronic.de/display/PD/DDR+less+ZYNQ+Design)and set the BootModeRegister to QSPI_MODE. Then followed this guide (
https://forum.trenz-electronic.de/index.php?topic=1085.0) to run some code in the FsblHookBeforeHandoff function. The PS functions as expected however some aspects of the PL are not working correctly. This makes me think that some of the data for configuring the PL is missing/overwritten. I am using the same Platform Project for the FSBL Application and the Standard Application and am using the prebuilt fsbl_flash.elf to flash the device with the bootimage generated from the FSBL Application as seen in the attachments.
I've also attached a photo of the linker script used for the system that works when programming over vitis and the memory usage of the built FSBL application.
I am unsure as to where the bitstream data for the PL might be being written to and hence am asking for some assistance in troubleshooting the issue.