How does the ethernet phy on the TE0820 control the phy LEDs on the TE0701?

[dm1000]

I have a TE0820 SOM and TE0701 carrier board.  I do not understand how the ethernet phy on the TE0820 (88E1512) drives the state of the phy LEDs to the TE0701 carrier board.
 
I believe I have read all the Trenz documentation for the CPLD on the TE0701 as well as the CPLD on the TE0820 - and I see that the CPLD on the TE0701 -
has 2 outputs that drive the two phy LEDs located on the RJ45 jack. But what input signals are driven to this CPLD that encodes the state of these LEDs?   I am assuming the
two phy LEDs signals are controlled by the 88E1512 phy on the TE0820. 

[JH]

Hi,
it does not control PHY LEDs.
You must change CPLD Firmware on TE0820 and TE0701 to forward signals to the LEDs(and configure ETH PHY correctly). PHY LEDs are more ore less only additional debugging LEDs https://wiki.trenz-electronic.de/display/PD/TE0701+CPLD#TE0701CPLD-LED
br
John

[dm1000]

Hi John,

I see net PHY_LED1 on the TE0701 is routed to the CPLD U21.  What does the CPLD do with this input signal?
Also I tested my TE0701 and observed the operation of the LEDs on the RJ45 jack.  Operation agrees with your statement.

[JH]

Hi,

I see net PHY_LED1 on the TE0701 is routed to the CPLD U21.

You mean TE0820 CPLD or? There are 2 CPLDs one one Module and one on carrier. U21 is Module COKD
On Module it's not used. See
https://wiki.trenz-electronic.de/display/PD/TE0820+CPLD
Send a mail to support@trenz-electronic.de in case you want to customise it.

Note: We are working on CPLD Update at the moment to support boot modes better:
https://wiki.trenz-electronic.de/display/PD/AVN-20220506+4+x+5+modules+controller+IOs+redefinition+and+CPLD+updates

And TE0820 will become also a new revision(05 is planned this year). Where PHY LED0 and 1 will be directly accessible on FPGA IO, so you can forward them on PCB Revision easier from module to carrier, like you want.
br
John

[dm1000]

Hi,You mean TE0820 CPLD or? There are 2 CPLDs one one Module and one on carrier. U21 is Module COKD

Yes my question was what did the CPLD on the TE0820 module (U21) do with signal PHY_LED1. 

On Module it's not used. See
https://wiki.trenz-electronic.de/display/PD/TE0820+CPLD
Send a mail to support@trenz-electronic.de in case you want to customise it.

Should I conclude that U21 does nothing with this signal - in the current firmware version?


Note: We are working on CPLD Update at the moment to support boot modes better:
https://wiki.trenz-electronic.de/display/PD/AVN-20220506+4+x+5+modules+controller+IOs+redefinition+and+CPLD+updates

And TE0820 will become also a new revision(05 is planned this year). Where PHY LED0 and 1 will be directly accessible on FPGA IO, so you can forward them on PCB Revision easier from module to carrier, like you want.

This is a new board layout?

Thanks,

dm1000

[JH]

Hi,

Should I conclude that U21 does nothing with this signal - in the current firmware version?

correct.

This is a new board layout?

yes. it's need because some of the used power regulators are not longer available.
In this context, we have made two small changes to the CPLD connection. PHY LED signal goes still to CPLD (to be backward compatible in case customer has used it) and also directly to FPGA(to make usage easier). And EN1 Pin will be removed from CPLD (only as zero ohm assembly option possible, in case some customer has own CPLD firmware and use this signal) and replaced with ZynqPS Reset. So CPLD can also reset Zynq if needed (this is not possible with older versions  and en1 signal has no functionality on older CPLD firmware, because en1 was completely solved via HW). --> In this case we can add the option to change boot mode via software and automatically reset the system with new boot mode. See also:
https://wiki.trenz-electronic.de/display/PD/AVN-20220506+4+x+5+modules+controller+IOs+redefinition+and+CPLD+updates
br
John