SF2_FAB_Probe Simulation 3.4

[erichz]

Following the guide I've installed Libero 12.5, but can't get the simulation step to work.   The only configurable parameter seems to be in the vhdl_run.do, which I verified is correct.     When I try to simulate, Modelsim opens but can't load the design due the error :

# vcom -reportprogress 300 -2008 -explicit -work presynth D:/Projects/Trenz/SmartFusion2_Fabric/component/work/FCCC_C0/FCCC_C0_0/FCCC_C0_FCCC_C0_0_FCCC.vhd
# ** Error: (vcom-7) Failed to open design unit file "D:/Projects/Trenz/SmartFusion2_Fabric/component/work/FCCC_C0/FCCC_C0_0/FCCC_C0_FCCC_C0_0_FCCC.vhd" in read mode.

It synthesizes and routes fine, so I don't see any obvious problem that is causing the above.  The only exception to that is when I run the tcl file it says:
Info: This version of Libero supports only the enhanced constraint flow.
Error: Parameter 'sanitize_envm' is not defined.

[shelton]

Hello, can you provide a screenshot or any pictures? I might have some ideas since I had the same problem before but first I want to compare it with the results I had. Do you define sanitize_envm as SmartFusion2, IGLOO2, or PolarFire SoC? I think it is possible to disable eNVM. I'm on my way to my flat in Greece but will check my documents as soon as I arrive and try to write an answer for you.