Hi, I'm working on zck26 Kria SoM and with the IP Core MPSoC.
In Vivado Block Design I configured th Zynq Ultrascale+ MPSoC with default option as follow:
SD0 (eMMC) Configuration
SD1 (SD) Configuration
Clock Configuration
After exporting XSA file, I created a new Vitis Project with the example "xsdps_raw_example.c" to use both SD Card and eMMC Memory. The SD Card (XPAR_XSDPS_1_DEVICE_ID) works fine while the eMMC Memory (XPAR_XSDPS_0_DEVICE_ID) doesn't work.
With debugger I noticed that the function with return status "XST_FAILURE" is "XSdPs_CheckBusIdle".
My final goal is to use the eMMC Memory as mass storage with FatFs library. I can run sucessfully the "FfsSdPolledExample.c" example on SD1 (SD Card) but when I try the same example on SD0 (eMMC Memory) I get "FR_NOT_READY" error. Obviously this happen because the low level driver (XSdPs_CheckBusIdle) fails. What's wrong with low level driver or with IP SD0 configuration?
In Vivado I configured MIO Pins, from 13 to 22 used for eMMC slot, to 1.8V.
I also tried to slow-down the clock to 50 MHz and to change the source from IOPLL to RPLL.
The eMMC still doesn't work.
In the guide
https://support.xilinx.com/s/article/71019?language=en_US suggests to give these info:
The IDCODE from 0xFFCA0040 is 04724093
The PS_VERSION from 0xFFCA0044 is 00000513
During debugging of "xsdps_raw_example" example, I notice that the method
XSdPs_CmdTransfer(InstancePtr, CMD55, 0U, 0U);
fails with code 2 (XSDPS_CT_ERROR) and at this point the suggested dump registers are:
ff18031c: sd_config_reg1 = 64506450
ff180320: sd_config_reg2 = 0EFC1EFC
ff180324: sd_config_reg3 = 04070407
ff16002c: clkctrl_sdclkfreqsel = 000EFA07
ff5e0104: dll_ref_ctrl = 00000000
0xFF16002C: reg_clockcontrol SDIO0 = 000EFA07
0xFF180314: ITAP = 00000000
0xFF180318: OTAP = 00000000
How can I solve it?
Thanks.
