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Reference design required to use 2 Etherner ports on TE0706

Started by null0x, December 09, 2021, 09:02:01 AM

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I have a TE0820 with a Zynq Ultrascale+ ZU3EG-1E (1GB) MPSoC on a TE0706-03 carrier board. The latter is equipped with two Ethernet ports which I try to make use of. Apparently, it is necessary to change the hardware description in Vivado to make use of the second Ethernet port. Trenz offers a reference design for a small number of chips though:

Unfortunately, there is no reference design available for "3eg_1e_1gb" on a TE0820 (PetaLinux 2019.2). Would it be possible to provide such a reference design such that I can use the two Ethernet ports?

Thank you


Hi, sorry we havn't a design for this combination at the moment and I also can give you a timeline when we will create one.

TE0820, TE0821, TE0823 will work with TE0720, but we test only TE0720 with TE0706 and the second ETH PHY of TE0706. So there is no reference design for other modules which used second ETH.
Note: Some customer has bring up the second PHY with TE0821.  To get second ETH on TE082x running without performance issue, remove one of the zero ohm resistors for the optional RX path, see:,1372.0.html

So I would suggest to start with the reference design:

and add all changes by yourself --> you can compare with TE0720.



That's unfortunate, but thank you for the hints how I still can manage to get the second ETH port running. Your first link does not work: Access Denied