Author Topic: TE0820: Problems adding Cortex-R5 to device tree  (Read 907 times)

null0x

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TE0820: Problems adding Cortex-R5 to device tree
« on: November 26, 2021, 04:38:37 PM »
Hello,

some time ago I purchased a TE0820 (1 GB version) that has a Zync Ultrascale+ ZU3EG-1E on top. The Trenz reference design for PetaLinux 2019.2 (3eg_1e_1gb) allowed me to successfully generate a working embedded Linux image for the Cortex-A53. Now, I'd like to execute code on the Cortex-R5 by using the remoteproc environment.

For this purpose I copy-pasted the cortex-r5 configuration from another device tree into mine, but - to be honest - without actually understanding what I am doing. The full device tree is attached to this question. The interesting part is the following:

Code: [Select]
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
rproc_0_dma: rproc@46d00000 {
no-map;
compatible = "shared-dma-pool";
reg = <0x0 0x46d00000 0x0 0x100000>;
};
rproc_0_reserved: rproc@3ed00000 {
no-map;
reg = <0x0 0x3ed00000 0x0 0x8000000>;
};
};
   
zynqmp-rpu {
compatible = "xlnx,zynqmp-r5-remoteproc-1.0";
#address-cells = <2>;
#size-cells = <2>;
ranges;
core_conf = "split";
r5_0: r5@0 {
#address-cells = <2>;
#size-cells = <2>;
ranges;
memory-region = <&rproc_0_reserved>, <&rproc_0_dma>;
pnode-id = <0x7>;
mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
mbox-names = "tx", "rx";
tcm_0_a: tcm_0@0 {
reg = <0x0 0xFFE00000 0x0 0x10000>;
pnode-id = <0xf>;
};
tcm_0_b: tcm_0@1 {
reg = <0x0 0xFFE20000 0x0 0x10000>;
pnode-id = <0x10>;
};
};
};

zynqmp_ipi1 {
compatible = "xlnx,zynqmp-ipi-mailbox";
interrupt-parent = <&gic>;
interrupts = <0 29 4>;
xlnx,ipi-id = <7>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
   
/* APU<->RPU0 IPI mailbox controller */
ipi_mailbox_rpu0: mailbox@ff90000 {
reg = <0xff990600 0x20>,
<0xff990620 0x20>,
<0xff9900c0 0x20>,
<0xff9900e0 0x20>;
reg-names = "local_request_region",
"local_response_region",
"remote_request_region",
"remote_response_region";
#mbox-cells = <1>;
xlnx,ipi-id = <1>;
};
};
};


Once PetaLinux starts I get promising kernel output, stating that the R5 is available:

Code: [Select]
[    4.614052] zynqmp_r5_remoteproc zynqmp-rpu: RPU core_conf: split
[    4.620294]  r5@0: DMA mask not set
[    4.623799]  r5@0: assigned reserved memory node rproc@46d00000
[    4.629852] remoteproc remoteproc0: r5@0 is available

I created a FreeRTOS-based HelloWorld program with Vitis and tried to execute it. Unfortunately, it fails

Code: [Select]
[  326.738741] remoteproc remoteproc0: powering up r5@0
[  326.753832] remoteproc remoteproc0: Booting fw image helloworld, size 588476
[  326.764073] remoteproc remoteproc0: bad phdr da 0x100000 mem 0x24a70
[  326.770422] remoteproc remoteproc0: Failed to load program segments: -22
[  326.777206] remoteproc remoteproc0: Boot failed: -22
-sh: echo: write error: Invalid argument

I have the impression that the device tree is wrongly configured. Could you please explain me how to properly configure the cortex-r5 for 3eg_1e_1gb?

Thank you very much.



JH

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Re: TE0820: Problems adding Cortex-R5 to device tree
« Reply #1 on: November 26, 2021, 09:38:39 PM »
Hi,
https://support.xilinx.com/s/question/0D52E00006hpkk1SAA/petalinux-on-cortex-r5?language=en_US
-->  you can't run Linux on R5 as it doesn't have MMU.

br
John

null0x

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Re: TE0820: Problems adding Cortex-R5 to device tree
« Reply #2 on: November 27, 2021, 01:43:02 PM »
Hi,

thanks for the reply, but apparently you misunderstood me: I am well aware that PetaLinux cannot be run on the Cortex-R5, but I've never planned to do so. Instead, I'd like to execute a FreeRTOS-based application (for now just "Hello World") on the R5.

More precisely, PetaLinux runs perfectly fine on the Cortex-A53 and now, I want to make use of the remoteproc framework. There is quite some information out there and as far as I know it is crucial to correctly specify the device tree. For instance, some helpful information are here on page 36 and 39:

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_1/ug1186-zynq-openamp-gsg.pdf

But the device tree needs to be changed for the chip I have. Unfortunately, I don't find any hints how to do you. The previously attached device tree is made for a 2GB version, but I have only 1GB (3eg_1e_1gb). I think this is why I get the memory error.

Does somebody know how to properly configure the device tree such that I run an application on the R5?

Thanks

JH

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Re: TE0820: Problems adding Cortex-R5 to device tree
« Reply #3 on: November 29, 2021, 12:35:24 PM »
Hi,
sorry I didn't work with two os until now. I know only that you must pay attention, especially on share memory usage. I can only refere to the Xilinx OpenAMP documentation which you has find by yourself.
Maybe write one time to Xilinx forum. this is an more general ZynqMP question. Xilinx community is bigger .

br
John

null0x

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Re: TE0820: Problems adding Cortex-R5 to device tree
« Reply #4 on: November 30, 2021, 03:30:45 PM »
I finally figured out a solution which I'd like to share. At first, you need to carve out a memory region for the Cortex-R5 in the device tree. This memory region will then be exclusively used by the R5. As far as I know it can be freely chosen as long as it falls within the available memory. You can open your .hdf/.xsa file in Vitis and inspect the lowest and highest memory address of your hardware:



In this example, the lowest adress is 0x00100000 and the highest 0x3fefffff. You can now freely reserve memory within this address area for the Cortex-R5. For instance:

Code: [Select]
reserved-memory {
...
rproc_0_reserved: rproc@17600000 {
no-map;
reg = <0x0 0x17600000 0x0 0x4000000>;
};
};

The reserved memory area starts at 0x17600000 and has a size of 64 MeB. It falls within the available memory and thus, is consistent with our hardware.

Once we load software, we receive the above error message. It indicates that the binary is loaded at 0x100000. This, however, is not allowed since the Cortex-R5 memory starts at 0x17600000 according to the device tree. Therefore, you need to modify the lscript.ld of your project such that it knows the specified memory area. The second last line is crucial here:

Code: [Select]
MEMORY
{
   psu_ocm_ram_0_MEM_0 : ORIGIN = 0xFFFC0000, LENGTH = 0x40000
   psu_qspi_linear_0_MEM_0 : ORIGIN = 0xC0000000, LENGTH = 0x20000000
   psu_r5_0_atcm_MEM_0 : ORIGIN = 0x0, LENGTH = 0x10000
   psu_r5_0_btcm_MEM_0 : ORIGIN = 0x20000, LENGTH = 0x10000
   psu_r5_ddr_0_MEM_0 : ORIGIN = 0x17600000, LENGTH = 0x4000000
}

Previously, the ORIGIN was set to 0x100000, which only works if the entire DDR memory belongs to the R5. In our case, it only starts at 0x17600000 according to the device tree. Once up update the address, you should be able to run your software on the R5 using the remoteproc framework.


JH

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Re: TE0820: Problems adding Cortex-R5 to device tree
« Reply #5 on: December 01, 2021, 07:07:42 AM »
Hi,
good to hear that you has found a solution for you and thank you for sharing this information here!
br
John