LVDS with TE0711 mounted on TE0703-05

[Mason1]

Hi Forum,

I am trying to get an LVDS output on I/O Bank 34 (from a TE0711 mounted on a TE0703-05). First, I make sure there is no CMOS pin connected to this bank, then I go ahead and define the constraint like this:

Code: [Select]

set_property -dict {PACKAGE_PIN V1 IOSTANDARD LVDS_25} [get_ports outn]; # J1-A28 IO_L7N_T1_34
set_property -dict {PACKAGE_PIN U1 IOSTANDARD LVDS_25} [get_ports outp]; # J1-A29 IO_L7P_T1_34

and I define the output port like this:

Code: [Select]

lvds_clk_0 : OBUFDS   -- LVDS clock
generic map (
    IOSTANDARD => "DEFAULT")    -- Specify the output I/O standard
port map (
    O => outp,     -- Diff_p output (connect directly to top-level port)
    OB => outn,    -- Diff_n output (connect directly to top-level port)
    I => input                 -- Buffer input
);

with "input" as a ~100 Hz sample clock. I also include the following libraries in my code:

Code: [Select]

library IEEE;
    use IEEE.STD_LOGIC_1164.ALL;
    use IEEE.NUMERIC_STD.ALL;

library UNISIM;
    use UNISIM.VComponents.all;


I should connect the I/O Bank 34 VCCIO to 2.5 V, as mentioned on page 2 of TRM-TE0711-0 [https://shop.trenz-electronic.de/trenzdownloads/Trenz_Electronic/Modules_and_Module_Carriers/4x5/4x5_Carriers/TE0703/REV06/Documents/SCH-TE0703-06-D.PDF] the VCCIOB is connected to bank 35 (Screenshot is attached). This pin is connected to J1B-B32 on the carrier board.

I connect a 2.5 V to this pin and program the device, outp and outn are shorted through a 100 Ohm resistor (this resistor models the termination resistor). Unfortunately, I do not see an output, as you can see in the oscilloscope screenshot (attached) both outputs are zero. I tried using a differential (non-LVDS output like DIFF_HSTL_I and it works well meaning that I see a differential output between outp and outn. Am I missing something or am I making a mistake here? Thanks.

[Mason1]

Sounds like the link takes you to another document, sorry for the inconvenience, here is the correct link:

https://shop.trenz-electronic.de/trenzdownloads/Trenz_Electronic/Modules_and_Module_Carriers/4x5/4x5_Carriers/TE0703/REV06/Documents/SCH-TE0703-06-D.PDF

[JH]

Hi,

with "input" as a ~100 Hz sample clock.

is this a typo? You mean 100MHz?

the VCCIOB is connected to bank 35 (Screenshot is attached). This pin is connected to J1B-B32 on the carrier board.

Carrier pinout is a general one for different modules. This notes was left from carrier designer, as carrier was design for annother 4x5 module.
So pay attention with the names on carriers.
We offer a pinout excel:
https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/Pinout
4x5_series_pinout_tracelength.xlsx


back to your problem. So when DIFF_HSTL_I works, I think you use correct pins.
Bank 34 supply is from JM2-1/3 this is carrier JB2-2,4  --> VCCIOB. J8 Jumper for VCCIOB can only set to 1.8V or 3.3V (see carrier schematic page 2), so you use external supply for 2,5V, that's ok.
Can you check one time that your voltage is correct?
https://www.xilinx.com/support/answers/43989.html


You did measure only differential or? When you measure single ended, did you see the CM level? This should be around 1.25V, see ds181 page 11

br
John

[Mason1]

Thanks for the answer, I realized there are two VCCIOB, one is connected to J1B-B32 and the other one is connected to J8. Turns out the J8 one was shorted to 3.3 V through a jumper and the 2.5 V that I was giving to J1B-B32 did not change that voltage (probably because my power supply was cutting the circuit). I removed the jumper of J8 and the circuit started producing LVDS outputs (attached). I have a 100 Ohm resistor and the output voltage is within the range.


I am going to design the PCB and will provide the Bank #34 VCCIO through pin J1B-32, I hope this pin is capable of passing enough current to this bank in order to do MHz LVDS. Thanks again for your help!