TE0711 getting started

[DetlefS]

Hi,
we are pretty new to FPGAs and purchased the TE0711 board because we need that much IO lines.

I managed to synthesize and implement the provided example with microblaze and Vivado 2019.2 . 

First Q: The complexity for the newbie is challenging, do you provide ( or are aware of ) some less complex 'blinkLED' examples for the board?

Second Q:  We will hopefully receive the carrier board TE0701-06 for the TE0711 at the end of July. In the meantime we will try to use XMOD JTAG ADAPTER  TE0790-03 for talking to the TE0711. Is there a tutorial or schematic for hooking Vivado, TE0790-03 and TE0711 together ?

Thank you
Cheers
Detlef

[Antti Lukats]

We do not provide "blinky" examples sorry about that.

you can look how the connection to XMOD should be implemented by looking at the TE0706 schematic
https://shop.trenz-electronic.de/de/search?sSearch=TE0706

there the xmod is properly connected.

[DetlefS]

Hm.

I know a much better support from other vendors.

Cheers
Detlef

[JH]

Hi,
our reference design includes LED control via Xilinx VIO debug core:
https://wiki.trenz-electronic.de/display/PD/TE0711+Test+Board#TE0711TestBoard-BlockDesign
https://wiki.trenz-electronic.de/display/PD/TE0711+Test+Board#TE0711TestBoard-VivadoHWManager

Ignore microblaze part, in case you want to control LEDs only.
Prebuilt binaries are included in the download, program FPGA with prebuilt bitstream to test some LEDs. You can also modify the project, remove all IP, keep only CLK Wizward(with sys_clk input) and VIO core and you has your blinky only design.

For IO Loc constrains we offer a pinout excel sheet:
https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/Pinout
4x5_series_pinout_tracelength.xlsx


This module can be used with different custom carriers also IO Bank power is variable, it's not possible to generate a general XDC file for this module, every combination is individual.

Regarding your question with TE0790. You can't use TE0790 alone with TE0711, you need always a carrier. In case you want create a custom carrier, you can use the altium project of the TE0706 as template for your own on and to check the connection (that's what antti means)

br
John

[DetlefS]

Hi,

after many hours of fiddling I got the LED blinking.
 
I am trapped in a 'managed_IP' jail, I cannot alter any read-only source in Vivado. I have to change the source with an external editor and then restart Vivado.
That is no acceptable design-flow.

How can I bring your example to a non-IS_MANAGED state, so that I can alter things?
The purpose of an example should be to add or remove things, right?

THX for your answer.

Cheers
Detlef

PS: With my skills it takes me half a day to fly a Digilent board, I'm now stuck for days with this board.
 

[JH]

Hi,

after many hours of fiddling I got the LED blinking.

Why?Program bitsteam (prebuilt binaries are also included, or simple generate the design) and change LED state via VIO debug core on Vivado HW Manager:
https://wiki.trenz-electronic.de/display/PD/TE0711+Test+Board#TE0711TestBoard-VivadoHWManager

You find some more about  Xilinx debug cores here:
https://www.xilinx.com/support/documentation-navigation/design-hubs/dh0011-vivado-programming-and-debug-hub.html

How can I bring your example to a non-IS_MANAGED state, so that I can alter things?

What does "non-IS_MANAGED" means?

The purpose of an example should be to add or remove things, right?

No, it's simple an example, for QSPI setup and LED control over Xilinx VIO core(This is more of a gimmick). You can reuse it or start from scratch TE0711 is a native FPGA without memory. You don't have to predefine anything, just select the right FPGA and you're done.

In case you start from scratch and you want to use QSPI, add also this common xdc file to your project:
https://wiki.trenz-electronic.de/display/PD/TE0711+Test+Board#TE0711TestBoard-Basicmoduleconstrains

PS: With my skills it takes me half a day to fly a Digilent board, I'm now stuck for days with this board.

I'm sorry for this but we can't give step by step tutorials with pictures and videos. We have significantly more variants and less resource than Digilent. We must assume basic knowledge with Xilinx tools. And Xilinx provide a lot of tutorials which show how you use native FPGA.

IO usage depends on carrier and your connection. We offer schematics and a excel pinout planner for loc constrains:
https://shop.trenz-electronic.de/de/Download/?path=Trenz_Electronic/Pinout
--> 4x5_series_pinout_tracelength.xlsx
--> https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0711/REV01/Documents

br
John

[DetlefS]

I  finally managed to do the stripped off blinkyblinky example by myself with the TE0711 on the  TE0701-06 carrier board, hard for me as a newbie, easy for you.

We do not have no carrier board on our design and we have to program the TE0711 in-situ.

I read
>>>>>  You can't use TE0790 alone with TE0711, you need always a carrier. In case you want create a custom carrier, you can use the altium project of the TE0706 as template for your own on and to check the connection (that's what antti means)
<<<<<

In the TE0706 design the JTAG line  TCK/TMS/TDI/TDO  are connected from the XMOD to the SAMTEC connector, nowhere else (same with the TE0701-06 with additional drivers).  If I hook up the four lines from my XMOD TE0790-03 to the SAMTEC connector of my TE0711 the FPGA is not recognized by Vivado.

I repeat my question: what is needed to hook Vivado, TE0790-03 and TE0711 together?

Thank you very much.
Cheers
Detlef

PS: for instance TE0701-06 and TE0706 are different carrier boards, too many T's, E's, 0's and 7's in all the boardnames , very puzzling and hard to remember.