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Can't program flash to QSPI

Started by enclustra_xu5, October 25, 2021, 02:34:14 PM

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Hi guys!   :D

I'm running the Enclustra XU5 module with a Xilinx Ultrascale+ MPSoC, and I'm trying to boot it up using QSPI32. There are three applications I want to boot up, one on the APU (A53_0) and two on the RPU (R5_0 and R5_1). The boot image I've created consists of my FSBL.elf (runs on the A53_0 core), my FPGA-generated bitstream, and the .elf files of all applications including one for the pmu (that runs on the PMU core, I've double checked), all in that order. Everything runs alright when I run the code using JTAG, but when I program flash it to QSPI, I get an error.

I've included the linker scripts of my three applications as attachments, and how I've ordered my partitions in my boot image. The blue covered lines are the applications for the A53_0, R5_0 and R5_1 cores.

Things I've tried - please don't suggest these things:

- turning the board off and on again

- Closing SDK and starting it up again

- cleaned everything and built it again

- I've double checked that I'm in the right configuration on the board with config pins

- generated the bitstream again

- tried to program flash to QSPI from Vivado, with no success

This is what my console looks like after trying to program flash:

cmd /C program_flash -f C:\MPSoC_Inverter\sw\bootstuff\BOOT.bin -offset 0 -flash_type \
qspi-x4-single -fsbl C:\MPSoC_Inverter\sw\fsbl\Debug\fsbl.elf -verify -cable type \
xilinx_tcf url TCP:

****** Xilinx Program Flash
****** Program Flash v2018.3 (64-bit)
  **** SW Build 2405991 on Thu Dec  6 23:38:27 MST 2018
    ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

Connected to hw_server @ TCP:
Available targets and devices:
Target 0 : jsn-JTAG-HS3-210299ABC3CA
Device 0: jsn-JTAG-HS3-210299ABC3CA-04721093-0

Retrieving Flash info...

Initialization done, programming the memory
===== mrd->addr=0xFF5E0204, data=0x00000222 =====
BOOT_MODE REG = 0x0222
WARNING: [Xicom 50-100] The current boot mode is QSPI32.
If flash programming fails, configure device for JTAG boot mode and try again.
Downloading FSBL...
Running FSBL...
Finished running FSBL.

U-Boot 2018.01-00073-g63efa8c-dirty (Oct 04 2018 - 08:26:33 -0600)


Board: Xilinx ZynqMP

DRAM:  256 KiB

EL Level: EL3

Using default environment

In:    dcc

Out:   dcc

Err:   dcc

ZynqMP> sf probe 0 0 0


Enclustra SoC  board? You know this forum is for Trenz  SoC and FPGA boards.  I don't get any money from Enclustra ;-)

From your log, Xilinx micro-Uboot has not get response from QSPI Flash. Either the flash is defective or I would imagine that you have incorrect settings for the FSBL. FSBL generation depends on your PS setup in your Vivado project (HDF/XSA export) and this setup depends on the PCB connection on the Enclustra Board.  You should check, if you use the correct setup for QSPI connection. Maybe Enclustra provide board files with basic PS configuration, if not than check schematics to setup PS IP correctly (QSPI MIO connections and DDR setup must fit as minimum setup).

I would recommend to ask enclustra support:
Maybe they have also some example designs available.