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TE0712_03

Started by batte72, November 07, 2024, 06:52:36 PM

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batte72

I have a big problem I search to insert sysytem ILA in my design , the ila have a clock 150MHz from clock wizard but  I program th device tis is reply:
INFO: [Labtools 27-1434] Device xc7a100t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
WARNING: [Labtools 27-3361] The debug hub core was not detected.
Resolution:
1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active.
2. Make sure the BSCAN_SWITCH_USER_MASK device property in Vivado Hardware Manager reflects the user scan chain setting in the design and refresh the device.  To determine the user scan chain setting in the design, open the implemented design and use 'get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub]'.
For more details on setting the scan chain property, consult the Vivado Debug and Programming User Guide (UG908).
WARNING: [Labtools 27-3413] Dropping logic core with cellname:'design_2_i/system_ila_0/U0/ila_lib' at location 'uuid_4B3CE664E2765957B9AAF87F9382A547' from probes file, since it cannot be found on the programmed device.

JH

Hi,
which reference CLK did you use for the CLK wizard IP? Does it match to the settings of your MMCM(CLK wizard)
ILA or VIO debug core are mostly not visible when the reference clk is not available.
br
John