Trenz Electronic Products > Trenz Electronic FPGA Modules

TE0720 fuse programming

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JH:
Hi,
I can share CPLD Firmware source code, in case you want to modify it by yourself. Send Email to support@trenz-electronic.de
Alternatively (I think it is maybe better solution for you), use bscan primitive from PL to get access to JTAG chain.
https://support.xilinx.com/s/question/0D52E00006hpMVUSA2/how-to-use-bscane2-and-bscan2jtag-ip-to-access-own-tap-through-primary-fpga-jtag-pins?language=en_US

Br
John

denial:
As I wrote, production is not simplified if we have to connect to JTAG to program the CPLD instead of having to connect to JTAG to program the FPGA fuses.

BSCAN has TMS and TCK as outputs. It is for adding a device to the JTAG chain, not for controlling the chain.

JH:
Hi,


--- Code: ---As I wrote, production is not simplified if we have to connect to JTAG to program the CPLD instead of having to connect to JTAG to program the FPGA fuses.
--- End code ---
sorry I misunderstand you. I expected some GPIO Controller which was running on Zynq PL....

Newest CPLD Firmware allow JTAG only boot mode with configuration B2B configuration signal setup. In case you must adjust timing, than you must try out, but this can also happens without CPLD. New CPLD Firmware has max path length constrain for JTAG signals. Changing HW to bypass CPLD for JTAG without multiplexing is unfortunately not a option for this series.
br
John

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