JTAG mode for TE0820

[jteeter]

Hello,

My company is developing FPGA designs for another company that has designed the TE0820 into their system. I would like to be able to program the FPGA (and use HW manager) via JTAG during debug, then program the QSPI, then allow the module to boot from QSPI.

Per the TE0820 TRM, I think that I need the "QSPI Firmware Version" so that I can switch back and forth between JTAG and QSPI modes using the MODE pin at the connector. Is this correct? Do I need to reprogram the CPLD? It looks like the module has the QSPI/SD firmware (four LED blinks per loop). If so, where can I find the JTAG/QSPI CPLD programming file?

Thank you,
Jason

[JH]

Hi,
JTAG is also available if the Boot Mode is not JTAG. But in case you want to have JTAG only boot mode, you can also change boot mode to JTAG only with Firmware update.

CPLD Firmware update instruction and link to the download of the different provided firmware variants:
https://wiki.trenz-electronic.de/display/PD/TE0820+CPLD+Firmware
br
John

[jteeter]

Ok thank you. When I power up the system I can detect the FPGA via JTAG but I get this warning: "PL Power Status OFF, cannot connect PL TAP. Check POR_B signal."
The green LED on FPGA module now blinks continuously (I have not attempted to change the CPLD firmware - based on your response I plan to leave it as-is). Signals EN1, RESIN and PGOOD are all 3.3V. MODE is tied low. Perhaps there is an issue with the HW.

Jason

[JH]

Hi,
you can ignore this message.  Boot something from SD or QSPI and you will not longer see this message. As long as Boot Mode is not JTAG, Vivado expected some design which was booted, in case this was not happens the wrong message appears.

br
John

[jteeter]

When I try to program the FPGA over JTAG from the Vivado HW manager it fails due to this error.

The carrier is custom. I am going to ask customer to look into testing first with a known good carrier.

br
Jason

[jteeter]

I noticed other posts where it is mentioned that the PS needs to boot from SD or other media in order to be able to program the PL via JTAG. Is that true? The carrier I am using does not support an SD card. Perhaps I can run SDK to program the QSPI first.

br,
Jason

[jteeter]

I exported .xsa from Vivado, created a platform and app in Vitis then launched a debug session in Vitis. It acted like it was programming the FPGA but failed with an error message of "DONE pin did not go high". So different error than with Vivado but still cannot program.

Jason

[JH]

Hi,

PS is needed for many things. on Zynq devices. PL only works only with restrictions.

When you try to get access with Debugger, it goes over PS. Did you use correct PS setup in your Vivado Design where you has generated the XSA file?
We offer reference designs with prebuilt binaries:
https://wiki.trenz-electronic.de/display/PD/TE0820+Test+Board

Use the prebuilt hello TE0820 boot bin from your assembly version and program QSPI flash.
https://wiki.trenz-electronic.de/display/PD/TE0820+Test+Board#TE0820TestBoard-Getprebuiltbootbinaries

Power off/ON after QSPI Programming, system should boot and PL should be programmed. Does this works?

br
John

[jteeter]

Hi John,

I discovered that the programming problem was caused by JTAG TCK signal integrity. Now I can program the device in Vitis (and Vivado HW Manager also shows the device as "programmed"). I expected the DONE red LED to turn off but it stays on.

Vitis fails to launch the Hello World program but this could be due to setup as you mentioned. I will try using a prebuilt binary.

Thanks,
Jason