TE0720-03-1CF CPLD signals output

[Hasson]

Hello,

I am trying to build a project with  TE0720-03-1CFA
https://shop.trenz-electronic.de/en/TE0720-03-1CFA-SoC-Module-with-Xilinx-Zynq-XC7Z020-1-GByte-DDR3-8-GByte-e.MMC-4-x-5-cm?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0720/Reference_Design

I would like to understand the signals between the control CPLD and the Zynq chip.
I could not find a document of the meaning of these signals.

In the schematics I can see that there are signals as XCLK, X1 to X7, PUDC_B and others which are connected to B34.
Is there any page where I can find the specs of these signals and their meaning?

The Firmware page shows the following message:
TE0720 CPLD - Firmware description (working in process)

Thank you in advance for your time.

Hasson

[JH]

Hi,

there is a older documentation available:
https://wiki.trenz-electronic.de/display/PD/TE0720+CPLD
--> rework of the description is necessary, but the basic things are described there.

br
John