Hello John,
I appreciate your fast response.
"
can you send me the whole article name. We have different assembly option (not only FPGA can be changed), so TE0745 (XC7Z045-1FBG676C) must be not unique."
Module: TE0745-02-91C11-A ; Link:
https://shop.trenz-electronic.de/en/TE0745-02-91C11-A-SoM-with-Xilinx-Zynq-XC7Z045-1FBG676C-1-GByte-DDR3L-SDRAM-5.2-x-7.6-cm"Why did you not use the TE0790 JTAG programmer which was delivered with TEB0745 carrier?"I don't have one now
With TEB0745 you can Boot from SD or QSPI. So put your Boot.bin on SD and start from SD(set BOOT Mode Pin to SD) or Program Flash(Set Boot Mode Pin to QSPI) .
We have an example design online, which includes prebuilt Boot.bin and image.ub to test HW (newest Version is for 19.2):
https://wiki.trenz-electronic.de/display/PD/TE0745+Test+BoardI know the example designs and the available boot modes, but to be more clear, my final target is to program TE0745 using microcontroller, external flash and Xilinx XAPP058(provided by xilinx) through the JTAG pins connected to TE0745.
"We never work with sfv . How did you try to generate sfv and how did you try to program? Can you send me the whole log?"I started by creating a FPGA only application (ButtonLed_PLSide). It’s a simple application just illuminate led when button is pressed. Button is connected to J23 pin 43 (on TEB0745) and Led is connected to J23 pin 42 (on TEB0745).
As I mentioned before, I downloaded bit file to FPGA using Vivado 2018.1 and Digilent XUP JTAG programming cable (the only one I have currently) and everything is ok.
The detailed steps to generate the SVF file are:
1- Open hardware manager from vivado.
2- Go to Tools and select “Create SVF Target”
3- Select name for the target; for example: TE0745_SVF
4- At device chain window press + button to add device then select “Add Xilinx part”
5- Select device “xc7z045fbg676-1”
6- Select the fpga from the generated chain, right click and select “add program device operation”
7- Select your bit file and press ok
8- Press “Export SVF” button and select where to save the generated svf
And that’s it.
The next step is to verify that the generated SVF (named: TE0745_SVF.svf) is correct by running it on the TE0745 as follows (Note: Jtag must be connected and the board is powered on):
1- Open hardware manager from vivado.
2- Select “Open target”
3- Select “Auto connect”
4- At TCL console type
“execute_hw_svf %path to your svf file% and press enter
Wait till loading is done, and If everything is ok (
which is not the case here;
but it’s the case for ZC706 kit as I mentioned before), you should notice that TE0745 red led is off and your code is loaded successfully (Led is on while button is pressed).
But I receive the error “xilinx [labtools 27-2255] output value 0001 does not match the tdo option value”.
"Can you reduce JTAG speed one time and try again."I will try to reduce the JTAG speed as you mentioned and let you know the result, but I think it will not make a difference and also I used the JTAG without changing its speed to download the bit file to the TE0745 using the “Program Device” option of the Vivado Hardware manager and it works fine.
"how did you generate your svf, I found only:
https://www.xilinx.com/html_docs/xilinx2018_1/SDK_Doc/xsct/use_cases/xsct_play_svf_file.html
--> so it seems its a record file from an running system or?"Yes that's right, these steps to generate SVF file for PS-side application (ELF) not for PL side and also I will use these steps later just after I finish the current scenario of SVF for PL side.
For now I will try to reduce the JTAG speed then I will try and If you figured out anything, please let me know.
Note: I attached the whole project with the SVF file.
Thanks,
Best regards.
