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Etherenet and Uart- TE0720 on TE0703 carrier

Started by ssh123, April 28, 2020, 03:29:43 PM

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ssh123

Hello,

I have SoC Module with Xilinx Zynq xc7z020clg484 on TE0703 - Carrier board.

I connected my PC to the carrier board with cables to these ports:
1. Mini USB connector
2. Barrel jack for 5 V* power supply

I am using UART0 and ENET0 I/O Peripherals. However my Zynq module is unable to receive broadcast data both via Ethernet and UART. The MIO pins, code look fine.
The DIP switch setting I'm using are as follows:
S2-1 = OFF
S2-2 = ON
S2-3 = ON
S2-4 = ON
Also I am using the modified TE Zynq FSBL. Any suggestions or inputs woulb be appreciated.

Thank you,
@ssh123

JH

Hello,
can you try out prebuilt boot.bin and image.ub from the reference design:
https://wiki.trenz-electronic.de/display/PD/TE0720+Test+Board
ETH should work out of the box and you should get IP via udhcpc --> in case it's supported on your network

br
John

ssh123

Hello John,

When I try with the prebuilt uboot. I get an IP address "DHCP client bound to address 192.168.202.140 (764 ms)". But it states ** Unable to read file image.ub **

I feel this could be because I am not using petalinux.

Do you feel it has anything to do with DDR controller configuration or the board delays ?

Thank you,
ssh123

JH

Hi,
did you use our prebuilt Boot.bin and image.ub as I suggested? Both on SD with one fat32 partition?
br
John

ssh123

Hello John,

Yes I tried with prebuilt boot.bin and image.ub

"Hello Trenz" boot.bin works fine.
I also tried boot image using GPIO and that works fine too.
But for prebuilt image.ub, I get this message "** Unable to read file image.ub **"
Note: I am using Windows 10

Thank you,
ssh123

JH

Can you send me the whole boot log. from FSBL up to this massage.
br
John

ssh123

Hello John,

Please find the screenshot of the boot log in that attachment.

Thank you,
ssh123

JH

Hi,
the newest one is 19.2 not 18.3.
Uboot can't find image.ub on your SD partition (same partition where you put Boot.bin). --> You set boot mode to SD, correct? Or did you boot Boot.bin from QSPI?
Can you show me your SD partitions and content?


Which TE0703 PCB revision do you use?
Can you send me all Jumper settings or make screenshot?
In case you use REV06, how did you connect J11 Jumper?
https://wiki.trenz-electronic.de/display/PD/TE0703+TRM#TE0703TRM-Jumper

br
John

ssh123

Hello John,

I just have the boot image boot.bin on my sdcard.

I use PCB TE0703-06.

These are the Dip switch settings I'm using:
S2-1 = OFF
S2-2 = ON
S2-3 = ON
S2-4 = ON

J5, J8, J9, J10 and J11 are all connected to M1.8V.

Thank you,
ssh123

JH

put also image.ub on sd, uboot search for image.ub on the sd card!

br
John

ssh123

Hello John,

I put image.ub for PetaLinux on my sd card.

Please find the output in the screenshots attached.

But my OS is not PetaLinux. Is that fine ?

Thank you,
ssh123

JH

Hi,
depends on your linux and device tree configuration and this depends on your PS setup, which is particular defined from the module and carrier periphery connection ( we provide board files) and from your own changes, depending from your design.

petalinux build environment has a lot of advantages which does some basic setup automatically from xported xsa(hdf) and it's yocto base, so you can also changes kernel, filesystem ....

We use only petalinux to build  linux part. I don't know  how you has generated your linux and how you has setup everything.

So our reference design seems to work. Our reference design include all sources to generate all by yourself, see also Wiki documentation.

I would recommend to use petalinux and our reference design at first, create everything without changes and if this works, start to modify.

br
John

ssh123

Hello John,

I will try with the Petalinux and proceed as per your suggestion.

Thank you very much,
ssh123

ssh123

Hello,

I have SoC Module with Xilinx Zynq xc7z020clg484 on TE0703 - Carrier board.

I connected my PC to the carrier board with cables to these ports:
1. Mini USB connector
2. Barrel jack for 5 V* power supply

I am using UART0 and ENET0 I/O Peripherals. However my Zynq module is unable to receive broadcast data both via Ethernet and UART. The MIO pins, code look fine.
The DIP switch setting I'm using are as follows:
S2-1 = OFF
S2-2 = ON
S2-3 = ON
S2-4 = ON
Also I am using the modified TE Zynq FSBL. Any suggestions or inputs woulb be appreciated.

Thank you,
@ssh123
[/quote]

JH

Hi,
we have more than on module with  xc7z020clg484
https://shop.trenz-electronic.de/de/Produkte/Trenz-Electronic/TE07XX-Zynq-SoC/TE0720-Zynq-SoC/
and every version has her own FSBL...


Did you select correct board support package? In case you are not sure, which variant you has, send me the serial number on the module and I can check.

We offer reference designs for all variants:
https://wiki.trenz-electronic.de/display/PD/TE0720+Test+Board
--> download includes also prebuilt Boot.bin and image.ub to test ETH directly. Does this prebuilt work?

br
John

ssh123

Hello John,

This is the version of the module I'm using:

TE0720-03-2IF

XC7Z020-2CLG484I

I also tried with the FSBL (TE modified) provided in the example design.

Thank you,
ssh123

JH

Hi,
there are several version included, there is no one universal TE FSBL. The included FSBL template source code need also valid XSA(HDF) from you assembly version.

So for TE0720-03-2IF but  test_board\prebuilt\boot_images\2if_1gb\hello_te0720\BOOT.bin from 2019.2 design on SD, set Bootmode SD and power on. You will see Hello TE0720 on UART in endless loop.

br
John

ssh123

Hello John,

The hello_te0720 in endless loop works on my board.

I am using the Zynq FSBL provided in the same project i.e.,

TE0720-test_board-vivado_2018.3-build_01_20190304100745\test_board\sw_lib\sw_apps

However, Could you please tell me more about the XSA(HDF) from assembly version ?

Thank you,
ssh123

JH

Hi,
XSA(HDF on 19.1 and older Vivado) will be generated from your VIvado Project and PS stetup from PS IP in your project(This defines your System for the softwarepart --> baremetal or linux).
So generate the project with our scripts:https://wiki.trenz-electronic.de/display/PD/TE0720+Test+Board#TE0720TestBoard-DesignFlow--> follow the instruction, "_create_win_setup.cmd" includes a selection guide, where  can select your TE0720 variant.--> XSA can be exported after synthesis(without bitstream) or after implementation(with bitstream) to SDK or petalinux.
Design description include also links to other documentation, in case you want to install board part files manually and load on your own project.
brJohn