Author Topic: Sata communication  (Read 190 times)

IhebHnaien

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Sata communication
« on: February 28, 2020, 04:00:50 PM »
Hi,

I'm working now on a xilinx project. I'm still a beginner and this is my first experience with Ultrascale+ MP.
I am working with TE0808 and I want to develop a Linux application on the Ultrascale MP to send data over the Sata interface. I installed Vivado 2017.4 and Petalinux 2017.4. First I started with designing a vivado project with ZynqUltraScale+ MP. Then I activated a Sata port (SATA Lane 1) and generated the hdf file of this design. Using this hdf file, I created a Petalinux project in oder to get a Linux kernel with enabled Sata support. I followed the hints given on the website of the xilinx wiki : https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842339/SATA . Since I am using a hdf file I configured only the Kernel via Menuconfig but I didn't modify the Device tree (It should be automatically generated in system-conf.dts file). After building the Petalinux project, I used the folder: PetalinuxProject/build/tmp/sysroots/plnx_aarch64-tcbootstrap as a rootfs for a new linux xsdk applicaion.

Here I got a little problem. I am not getting any sata support in the included libraries (Sata should be supported with the libata library but I can't find it in the included libraries).

How can I correctly configure the Petalinux kernel in order to get the required software support for the Sata communication on the xsdk interface ?

Thanks in advance  :)

JH

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Re: Sata communication
« Reply #1 on: March 02, 2020, 07:37:33 AM »
Hi,
at first, please use newer Vivado/Petalinux version. Xilinx has changed a lot of things (new features and a lot of bug fixes) a specially for ZynqMP devices.

We also provide reference designs, with basic setup (in case you use our TEBF0808 carrier) and petalinux template:
https://wiki.trenz-electronic.de/display/PD/TE0808+StarterKit
--> Sata works on these example design. We did not changed anything for SATA in linux.
--> try out prebuilt Boot.bin and image.ub at first, so you can test directly (Sata disk should be formate as ext4)
br
John

IhebHnaien

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Re: Sata communication
« Reply #2 on: March 20, 2020, 12:33:16 PM »
Hi
Now I'm using Vivado/Petalinux 2019.2 .I created a Vivado project and generated the xsa file. Then I used this xsa file to create a linux kernel witth petalinux. In the linux kernel I activated the Sata interface and I generated all the files and directories required for Vitis. After that I launched Vitis from Vivado and created a linux platform based on my Petalinux project and my xsa file. But the problem is that my Platform is always out-of-date. I tried to rebuild my platform but it's always the same although the "problem window" of vitis doesn't show any errors and it says that the build was succesfully done.

BR
Iheb

JH

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Re: Sata communication
« Reply #3 on: March 20, 2020, 07:56:33 PM »
Hi,
 did you use Win OS or Linux for Vitis?
I didn't see the behavior which you wrote until now (We use WinOS).
Did you create platform project with our without fsbl and pmu?
I've done some short description for basic Vitis usage:
https://wiki.trenz-electronic.de/display/PD/Vitis#Vitis-CreatePlatformprojectforXSA
https://wiki.trenz-electronic.de/display/PD/Vitis#Vitis-BuildPlatformProject

PS: on our 808 series it was not need to change kernel for SATA (everything for sata was done with xsa import). Our manuel changes was:
https://wiki.trenz-electronic.de/display/PD/TE0808+StarterKit#TE0808StarterKit-SoftwareDesign-PetaLinux
what did you change?
br
John

IhebHnaien

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Re: Sata communication
« Reply #4 on: March 24, 2020, 11:17:51 AM »
Hi,

I'm using vitis on WinOS too. I created the petalinux project on a virtual machine then I copied the Linux Folder on the shared Folder. In order to activate The Sata interface I've done the Kernel configurations as it was defined here:  https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842339/SATA  But I didn't modify the device tree file.

Then I created a linux platform with my xsa file and without fsbl and pmu (I have chosen : generate boot components).
In the Linux domain I defined the following 4 files:
BIF File: containing the files: system.bit, bl31.elf,u-boot.elf
Boot Components Directory: The Linux folder copied form The petalinux project
Linux Image directory: the same linux folder
Sysroot Directory : the Folder \linux\sysroots\aarch64-xilinx-linux

Then I tried to build the Platform. The Vitis Console and Vitis log didn't show any errors but I'm getting always an out_of_date platform.

BR
Iheb

JH

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Re: Sata communication
« Reply #5 on: March 24, 2020, 11:35:35 AM »
Hi,
bif need also fsbl and pmu in your boot.bin  Check the bif file of our reference design
For barmetal mostly fsbl pmu bitfiles(optional) and application(elf) are necessary
For linux  fsbl pmu bitfiles(optional), ATF(bl31) and u-boot(elf)  are necessary

Quote
  https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842339/SATA
we must not change any kernel setup manually for sata on our reference designs.

Use Vitis only to generate FSBL, PMU and Boot.bin on WinOS
Instead of system directory use directly generated image.ub from petalinux.
br
John

br
John

IhebHnaien

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Re: Sata communication
« Reply #6 on: March 24, 2020, 11:47:43 AM »
I already tried to use a bif file which is containing the pmu and fsbl files too. I generated this bif file with the Petalinux-package instruction. But I got the same problem.

I will try now to generate a new petalinux project without changing any kernel setups. And I hope that it solves the problem.

BR
Iheb

JH

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Re: Sata communication
« Reply #7 on: March 24, 2020, 12:24:57 PM »
Hi,
PS configuration on the Vivado design (the resulting XSA), FSBL, PMU, ATF, uboot, linux ...all work thogether.
Where did you get your SATA reference CLK? Did you use PLL form the module or external ref from a carrier? In this case you use module FSBL, you must also initilise PLL, see FSBL code of our starterkit reference design.

br
John

IhebHnaien

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Re: Sata communication
« Reply #8 on: March 24, 2020, 12:44:46 PM »
Hi,

We used PLL from the Module.

BR
Iheb

JH

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Re: Sata communication
« Reply #9 on: March 24, 2020, 12:46:20 PM »
you has initilised PLL correctly?
br
John

IhebHnaien

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Re: Sata communication
« Reply #10 on: March 24, 2020, 01:24:08 PM »
Here are some screenshots showing the initializations that we have made.

JH

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Re: Sata communication
« Reply #11 on: March 24, 2020, 04:09:36 PM »
Your Screenshot is only REF CLK selection and expected CLK.

SI5345 will be initialisation is done with FSBL.

Please check our reference design:
https://wiki.trenz-electronic.de/display/PD/TE0808+StarterKit
https://wiki.trenz-electronic.de/display/PD/TE0808+StarterKit#TE0808StarterKit-Application

br
John

IhebHnaien

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Re: Sata communication
« Reply #12 on: March 26, 2020, 04:19:17 PM »
Hi,

I still have the same problem.
1/ Petalinux Project
I created first a petalinux project on the Virtual machine. And I created a BIF File (you can find below its content). Then I copied the linux folder and the bif file from the virtual machine through the shared folder.

2/ Vitis
Then I created a platform on Vitis:
       1- I used my xsa file and I have selected Linux as my os
       2- I left the "generate boot components" selected
       3- I added the Paths of the bif file, Linux Directory, boot components directory and the sysroot directory
       4- I copied the FSBL Files of the reference design as described on your website.
       5- Then I builded the Platform but it's still out of date

PS: I tried to not use the auto-generated boot components and instead of it I used the zynqmp_fsbl.elf File for the the FSBL and the pmufw.elf File  for the PMU (both are created by petalinux). And unfortunately I still have the same problem.

BIF File:
the_ROM_image:
{
   [bootloader, destination_cpu=a53-0] /home/iheb/Desktop/patalinux_sata/images/linux/zynqmp_fsbl.elf
   [pmufw_image] /home/iheb/Desktop/patalinux_sata/images/linux/pmufw.elf
   [destination_device=pl] /home/iheb/Desktop/patalinux_sata/images/linux/system.bit
   [destination_cpu=a53-0, exception_level=el-3, trustzone] /home/iheb/Desktop/patalinux_sata/images/linux/bl31.elf
   [destination_cpu=a53-0, exception_level=el-2] /home/iheb/Desktop/patalinux_sata/images/linux/u-boot.elf
}

BR
Iheb

JH

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Re: Sata communication
« Reply #13 on: March 30, 2020, 09:20:37 AM »
Hi Iheb,
which Reference CLK did you select on your PS IP? --> you has select valid REFCLK and this REF CLK is also available?
PS: In case you use SI5345 output from the module, you must initilise SI. Use or FSBL modifications or write NVM with valid configuration.

Do you use our TEBF0808 carrier? If yes, did you try out our reference design (prebuilt Boot.bin and image.ub are also included)? Sata is enabled on these reference design.
br
John

IhebHnaien

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Re: Sata communication
« Reply #14 on: March 30, 2020, 01:23:54 PM »
Hi John,

The reference clock can be seen in the two screenshots. According to the circuit diagram of the TEBF0808 (YES we use this carrier), THIS Ref Clock 1 which we use for SATA is not even connected to the PLL (SI5345) but directly to a 150MHz oscillator. Therefore, the FSBL has no effect since the Ref Clock 1 is not configurable but constant. Nevertheless, we are using your FSBL now, and it initializes all PLL clocks from the SI5345 as you did in the reference design.

I can't try out your prebuilt reference design because I am doing only homeoffice now and I don't have the hardware at home.

To sum up, my colleague prepared the vivado project and the xsa File. My task is to write a linux application which receives data from the PL part and sends it over the Sata interface. So I have to use Vitis to prepare this application.

I would be glad to use your prebuilt design. This will save me a lot of time and effort. You said the sata interface is already enabled on your reference design. But I can't use it as it is. I have first to use Vitis to write a code which receives data from PL and sends it automatically through the SATA interface.

I would be grateful if I could get the four directories to create a Linux Platform based on your Reference design (I didn't find them in your uplaoded starter Kit) so that I can create a Platfrom on vitis and develop an application which sends the data over the SATA interface:
                                -BIF File: containing the files: bitstreeam.bit, bl31.elf,u-boot.elf
                                -Boot Components Directory: The Linux folder copied form The petalinux project
                                -Linux Image directory: the same linux folder
                                -Sysroot Directory : the Folder \linux\sysroots\aarch64-xilinx-linux

BR
Iheb

JH

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Re: Sata communication
« Reply #15 on: March 30, 2020, 01:31:10 PM »
All included, expected  Sysroot directory, I used only image.ub

You can also export vitis platform from the reference design with our scripts.
Download the version with prebuilts, generate the vivado design for your assembly variant with my scripts and start vitis with our scripts, see:
https://wiki.trenz-electronic.de/display/PD/TE0808+StarterKit#TE0808StarterKit-DesignFlow
--> I will add some notes to to this manually in the future on this page: https://wiki.trenz-electronic.de/display/PD/Vitis
br
John

IhebHnaien

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Re: Sata communication
« Reply #16 on: March 30, 2020, 02:10:36 PM »
Hi,
In the step 2 of your design flow, which modules should I select after pressing 0 and starting the Module Selection Guide.

And in step 4,should I start vivado manually and create a project or it should be done with one of your scripts ?

https://wiki.trenz-electronic.de/display/PD/TE0808+StarterKit#TE0808StarterKit-DesignFlow


BR
Iheb

JH

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Re: Sata communication
« Reply #17 on: March 30, 2020, 03:02:18 PM »
Hi,
all with scripts.
run "_create_win_setup.cmd", press zero and follow instructions on the console. It generates the  Vivado reference design with your selected TE0808 variant.
On Vivado you can build the project and generate the Vitis project with additional script functions on the Vivado TCL console.

br
John