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Initiate AXI DMA transfer with Custom Axi Lite Master IP block

Started by trek123, February 25, 2020, 08:32:06 AM

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trek123

Hello everyone, I want to send data from PL to PS and PS to PL by using AXI DMA IP block in Embedded Linux. In order to do that, I want to write AXI DMA address space with FSM by using AXI Custom Block to initate the transfer own my own. Here is my strategy;

- 1) Writing 0x0001 to control register(4040_0000) of DMA block

- 2) Writing 0xe000 to MM2S_START_ADDRESS register (4040_0018) of DMA block

- 3)  Lastly Writing 0x0020 to MM2S_LENGTH register (4040_0028) of DMA block

However, I cannot write data to these addresses, although I can write the other addresses(for example 0x0600_0000). My fsm in the AXI Custom Block is in the attached file.

Thank you for your any help...

JH

Hi,

did you check address mapping of your IP in the vivado design?
You use the correct offset to get access to your IP?  --> you can autoasign offset or give manually, possible address range is different on Zynq and ZynqMP and also depends on the AXI PS interface.
See:
https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf

PS: Maybe you should also write to Xilinx forum, it's SoC device internal question, so you get maybe faster an answer/solution.

br
John