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Read Uart Sensor with petalinux project

Started by trek123, November 08, 2019, 08:55:36 AM

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trek123

Hello everyone, I set up petalinux kernel and minimal ubuntu file system to my zynqberry board. After that, I blink led by using axi_gpıo on the board. However, I must read uart sensor via fpga pins. I design the IP blocks in the attachment but I'm not sure it is correct or not. In addition to that, I don't know which configuration parameter should be select in steps like petalinux-config etc. Lastly, after build kernel, what should I do? Is there any good tutorial or anyone help me?

Thanks...

JH

Hello,
why the second UART?
why AXI GPIO. you can also activat EMIO GPIO in the PS IP

Use our test board design:
https://wiki.trenz-electronic.de/display/PD/TE0726+Test+Board
generate at first all without changes --> it should work like described in the wiki.
Add your GPIO core (or use EMIO GPIO) and regenerate FSBL and all linux files (maybe you must change a little bit on device tree --> see description below, but if you has luck, it will be done automatically on hdf import) with your new HDF (clean up the petalinux project before)
After that you can get access to your GPIO with Xilinx description:
for AXI GPIO:
https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841846/AXI+GPIO
https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842398/Linux+GPIO+Driver

br
John

trek123

Sorry my English for my first post. I managed the blinked led using AXI_GPIO but I must recieve data by using PL pin due to my project requirement. Not only uart but also spi and i2c may be added the project. Therefore, I should learn how to design and program communication protocol.

Thanks.

JH

Hi,

you can also map SPI and I2C, uart... controller from PS to PL in case you did not use them on MIO.
To communicate between PS-PL, you can use AXI with AXI FIFO IP ord AXI DMA IP or simple AXI register IP
You should check one time TRM (do not read all :-) , only try to understand architecture and later if you work on some parts also try to understand how this parts work):
https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf

An one note: In case you change PS configuration or PS-PL interfaces and/or address space, you should also regenerate FSBL, Uboot, linux.... change only linux device tree is not always enough. everything belongs together.

br
John