SI5338 clock configuration error in FSBL

[durga]

We have a TE803 starter kit with zu4ev chip. I am attaching an excel file that was created by Vivado via a JTAG download and also a screenshot of Vivado.

The issue I am facing is this: the FSBL that came on the SPI flash had an error about the SI5338 clock in the FSBL. Re-building and reprogramming the flash still has the same exact issue. The message on the serial console is as follows:

----------------------------------------------------------------------
Xilinx Zynq MP First Stage Boot Loader (TE modified)
Release 2018.2   Sep 30 2019  -  16:54:23

--------------------------------------------------------------------------------
TE0803 Board Initialisation
SI5338 Init Function
Si5338 XIicPs_MasterSendPolled failure
Error: Configure SI5338 CLK
Xilinx Zynq MP First Stage Boot Loader (TE modified)
Release 2018.2   Sep 30 2019  -  16:54:23

--------------------------------------------------------------------------------
TE0803 Board Initialisation
SI5338 Init Function
Si5338 XIicPs_MasterSendPolled failure
Error: Configure SI5338 CLK


I am following the recipe to rebuild the FPGA bitstream that comes with the Starterkit download. My build environment is:
Windows 7 Pro 64 bit; Vivado 2018.2

Can someone please help?

Best regards,
Durga Choudhury

[JH]

Hi,
which module did you use? I need the article number.
From your description I expect one of the TE0803 assembly version?
FSBL creation seems to be ok, but System get no access to SI5338
Did you use out carrier? On TE0803/7/8 I2C for Si goes over carrier. With our carrier you need to configure I2C switch at first. In case you has your own one, it depends how you has connected it.
And did you use correct I2C controller in your PS configuration?
br
John

[durga]

Hi

This unit was purchased by one of our design partners and was shipped to us. Here is the relevant line from the board description .csv file that is inside the Starterkit directory:

24   TE0803-01-04EV-1EA    xczu4ev-sfvc784-1-e           trenz.biz:te0803_4ev_1e_tebf0808:part0:2.0    4ev_sk        qspi_dual_parallel      mt25qu512-qspi-x8-dual_parallel       PCB:1  |B:1|I:1|P:3a|R:2GB

I suppose this the information you need?

To answer your other questions, this is what I did:
1: In line 48 of design_basic_settings.cmd, changed the PARTNUMBER to 24
2: Ran _create_win_setup.cmd
3: Ran vivado_create_project_guimode.cmd
4. Exported the bitstream and launched SDK
5: Built the FSBL in SDK
6: Programmed the QSPI flash

I am not sure how to configure the I2C switch in the carrier board or how to generate I2C IP in the PS bitstream. I had hoped the startkit would "do the right thing" once I had selected the correct board number in design_basic_settings.cmd. Could you please point me to some documentation (and specific pages, for particularly large documents) where I can get some details?

Thank you,
Durga Choudhury

[JH]

Hi,
board part files and the design , you has selected are for this carrier:
https://shop.trenz-electronic.de/en/TEBF0808-04A-UltraITX-Baseboard-for-Trenz-Electronic-TE080X-UltraSOM
https://wiki.trenz-electronic.de/display/PD/TEBF0808+TRM
I2C Bus is connected to I2C switch on this carrier. Our FSBL template for this Modul/Carrier configuration configures this I2C switch before SI5338 will be configured.

Did you use this carrier with your TE0803-01-04EV-1EA?

Nearly all MIOs of the ZynqMP goes to the B2B connectors on the TE080x series. So carrier defines the PS Configuration, in case you use an carrier with other periphery, you must set up the PS manually (I don't know how your design partner has connected all the perihpery, in case it is an custom carrier). We include also board parts with QSPI, DDR (this both are on the module) an UART(need to get any output --> this is set to MIO like on TEBF808) only activated (used in the test_board example). You can use these to start with the definition of your PS configuration.

br
John