Eth0 issue on TE0715 + custom Carrier

[Chris12]

Hello,

We are trying to boot up a TE0715 module on a custom carrier board.
SDK is used to generate the FSBL from the HDF file provided by the HW team.
BOOT.bin is created with the generated FSBL + custom bitstream + u-boot from Trenz test_board project.

Issue is that u-boot complains about "PHY is not detected"
After investigation we found out that gem0 doesn't seem to be configured: registers at 0xe000b000 contains incorrect value.

The HW project was created from the one provided by trenz for TE0701, udpated for our custom board. But we can't figure out where these gem0 registered are initialized in FSBL, and how to update the vivado project to generate a working configuration.
Note that I suppose that this is done by FSBL...

So I need some guidance here to properly configure gem0 registers.

Thanks

[JH]

Hello,

Which Vivado Version did you use?
Which TE0715 assembly variant did you use? I need the article name
And can you send me the name of the ZIP file, which your described as " The HW project was created from the one provided by trenz for TE0701"

Can you try out one time the prebuilt boot.bin and image.ub of your assembly variant from our 18.3 reference design:
https://wiki.trenz-electronic.de/display/PD/TE0720+Test+Board
https://wiki.trenz-electronic.de/display/PD/TE0715+Test+Board#TE0715TestBoard-Hardware
https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0715/Reference_Design/2018.3/test_board

In case you carrier is like 701, than it should work there also.
Do you have one of our carrier on place?

PS: In case you change something on PS settings or PS-PL interfaces or AXI address area, you must regenerate FSBL, UBoot and Linux again otherwise the running system has older configuration which does not belong to your bitstream configuration.

br
John

[Chris12]

Hi John,
We are using vivado 2018.3
The module is TE0715-04 (xc7z030sbg485-1)

One change we have on our boart is that UART is going through EMIO instead of MIO, so the prebuilt boot.bin won't work on our board (or it will work, but I won't see any output on uart)

We do have TE0701 carrier that we used for preliminary test. For this TE0701 board, I can use the provided HDF project and generate a working BOOT.bin (with prebuilt U-boot)

- who configures gem0 0xe000b000 registers ? u-boot or FSBL ??
    - if FSBL: where to configure it ?
    - If u-boot: why the prebuilt u-boot would not configure gem0 the same way than on TE0701?? the only change on our board is UART and this is working as expected. Ethernet should be the same.

What I did not do is regenerating a new u-boot. But this is not trivial and I'd prefer to have more details before digging into this.

Thanks

[JH]

Hi,

hdf export from the vivado project described your system configuration.
this hdf is normally  used to generate FSBL, Uboot and Linux.
FSBL sources must be normally not changed(all is done automatically), excepted you need some additional resets or you want configure some periphery (you can add yor own code to FSBL)
UBoot and linux will also used to HDF to get system definition. Basics will be done automatically, but not all. The most settings will be saved in the device tree, which is used later, but there are also other config files available to define the system --> so you never can be sure that your system only use the device tree.

On power up the FSBL configures the system (initilised CLKs, DDR, MIO  and PS-PL interfaces), like it's defined in the HDF. Uboot use generated configuration from platform...h (and this depends partial  on the generated petalinux device tree) and linux use the same setup which is defined in the device tree (depends on HDF and user changes).

From your first post, you wrote

generated FSBL + custom bitstream + u-boot from Trenz test_board

So Uboot + FSBL used same HDF and you didn't see any console output because you use other EMIO.
What did you connect on the MIO, which we use normally as UART --> this parts think it's still MIO and you didn not see what they do?
You did not changed anything on your PS setup, excepted UART?

I would recommend:

   
• to generate the reference design vivado project.
• change only uart to EMIO and connect to the correct FPGA Pin
• Create HDF
• Export HDF into SDK and generate FSBL again (our use our HSI scripts)
• use our petalinux template
• add your hdf with the changed UART and generate uboot and linux

See also decription and links on: https://wiki.trenz-electronic.de/display/PD/TE0720+Test+Board
BrJohn

[JH]

Hi,
sorry I send you the wrong link to the reference design.
TE0715 is
https://wiki.trenz-electronic.de/display/PD/TE0715+Test+Board
br
John

[Chris12]

Thanks for your feedback and detailed information.
After further investigation I found out that the root cause was a hardware problem.
Once fixed, everything works fine with the prebuilt uboot file.
Regards,
Christophe