csi2_rx_phy IP reset signal

[p.ching.kuang@gmail.com]

Dear,
For the zynqberry board + Rapi-camer, I found the output image with noise signal sometimes. After dump the waveform (ILA) of csi2_rx_phy IP, I found that the mipi symba "B8B8" is correct, and after that, all other high byte will be wrong (low byte is correct) ?
Do this condition will be relative with LP number is only one lane in your original vivado design?
If there is any method like reset "csi2_rx_phy IP" again to make it re-sync again for next new frame?
Any comment?

[JH]

Hi,
did you use Raspberry Pi Camera Rev 1.3 or Camera Rev 2.1? I think Rev2.1?
Demo works with REV2.1 but not complete stable, see note  on additional HW Requirements::
https://wiki.trenz-electronic.de/display/PD/TE0726+Zynqberry+Demo1#TE0726ZynqberryDemo1-Hardware

Problem is, that Rev 2.1 data output from the camera is faster and has some breaks. So data sampling is a little bit more complex. And camera register configuration is not available, so we use the most default settings of the camera what we find in some forums.

The Demo Design includes all source of our IPs and the software. You can modify to get better results or your try to find a better camera register configuration.
br
John

[p.ching.kuang@gmail.com]

The content of file _i_csi.xdc in this website, it only used one set of csi_d_lp_n[0] rather than two lp signals for two lanes camera, why?
Does it possible have any settle time issue for mipi two data lanes?