csi2_rx_phy IP issue

[p.ching.kuang@gmail.com]

Dear,
For zynqberry+raspberry 2 lanes camera, your design is only use one LP signal.
Why just only one LP signal rather than 2 LP signals (data0 & data1)?
thank you.

[JH]

Hi,

the camera register configuration is not available, so we use the most default settings of the camera and what we find in some forums to create this demo.

The demo design includes all source of our IPs and the software. You can modify to get better results or your try to find a better camera register configuration.

br
John

[p.ching.kuang@gmail.com]

The camera default setting is 2 lane (include PCB), but why the FPGA board design for only one LP0 rather than two LPs (one is LP0, another is LP1)?

[JH]

Developer is OoO, maybe he can give some additional notes, when he's back.
But it's only a demo, not optimised. Feel free to change, if you find a better solution.
br
John

[p.ching.kuang@gmail.com]

Thanks for reply. But if I want to try the two LPs solution, we need to rework the PCB. Therefore, before rework PCB, I want to understand the CSI IP design rule to confirm we should use two LP lanes or just one LP lane for two lanes mipi camera. Maybe Oxo could help me after he is back. Thank you.

[p.ching.kuang@gmail.com]

Hi JH,
Any update by OoO? When did he back?

[Antti Lukats]

Hi,

CSI on Zynqberry was added with some compromises, it is working and usable but has limitations. The intended use is that all lanes work in unidirectional mode only.

You are can use the hardware for any experiments (soldering and changing pcb) but this would sure be on your responsibility then. We can not provide much support beyong what we have already offered.

br
Antti

[p.ching.kuang@gmail.com]

thanks a lot.