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SFP Link Problem Using Aurora 8B/10B Between VC707 and TE0741

Started by ehsim1, June 20, 2019, 12:27:54 PM

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ehsim1

We are using TEBA0841 base board and TE0741 Board from Trenz. We are trying to set up a duplex link using Aurora 8b/10b IP between a Xilinx VC707 board and TE0741 board over SFP connector. We followed Xilinx XAPP1193 document and generated Open IP Example Design and changed only constraint files for two fpga boards.
First we made sure Aurora/SFP interfaces are working as expected in an external loopback mode via SFP connector ( independently in two boards).

Our problem starts when attempting to connect the two boards (VC707 and TE0741) over SFP.
Two FPGA boards plugged into the same computer and, we programmed two FPGAs as mentioned in the XAPP1193 document. 
When we start communicating, lane_up and channel_up signals never go high.
Moreover, there seems no problem as hard_error and soft_error signals didn't change.
We are using 125MHz clock on board (VC707 - AH7 and AH8 pin, TE0741 XC7K410T - F5 and F6 pin).
We controlled TX and RX line and they are properly connected.
Aurora8b/10b IP modules are similarly configured on two boards. 

We would appreciate if you could help us to solve this problem?

JH

Hi,

did you try out Xilinx IBERT? Create Xilinx IBERT example for TE0741 and VC701 and check if you can get connection there. With Xilinx IBERT you can change configuration and pattern, to to narrow down the error.

br
John