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TE0820 SD card Unable to open file

Started by luca_osrf, April 26, 2019, 01:01:41 PM

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luca_osrf

Hi all,

We recently produced a custom carrier board for the TE0820 module and we are currently running into a few issues in the boot process, specifically (after enabling the maximum debug level in the FSBL) we get the following output:

================= In Stage 2 ============
SD1 Boot Mode
SD: rc= 0
File name is 1:/BOOT.BIN
SD: Unable to open file 1:/BOOT.BIN: 3
                                      XFSBL_ERROR_SD_F_OPEN
Boot Device Initialization failed 0x29
================= In Stage Err ============
Fsbl Error Status: 0x0�

Where it is failing to open the BOOT.BIN file.
Now the reasons that make the errors more cryptic to debug:

  • We have two modules and both work just fine on the TE0703 carrier board.
  • Of those two modules, one works without issues as well in our carriers, the other one doesn't and shows the error
  • We tried on two different carriers and the same behavior shows (only one module failing)

I have been reading on the forums and there isn't much information around, someone suggests lowering the clock speed (but then again why would it work with one module and not with the other?) or being due to a different silicon version.

Everything else (supply, SD card) is the same. Attaching the settings from our Vivado.

Any idea? I have been reading that the SD frequency should be in the order of 50 - 25MHz but I never changed the default value of 200MHz and it always worked?

If it can help in any way the S/N of the TE0820 modules are 536750 (working one) and 536749 (non working one)

Thanks!
/Luca

luca_osrf

Small update, we had the same result with the prebuilt image

JH

Hi,
so it works with TE0703+TE0820 but not with your carrier and TE0820? Same SD Card, same Boot.bin?

How did you connect SD? Did you use Level translator? Which one? Can you send this part and the B2B connecotr part of your schematics to support@trenz-electronic.de?
br
John

mrguy07

I have the same exact issue with a custom produced carrier board for the te0820. Copied the the hardware peripherals (SD, USB ETH) from the TE0706 verbatim.

I get the exact same printout from FSBL after enabling extra prints.

The '3' at the end of this print (SD: Unable to open file 1:/BOOT.BIN: 3) indicates the device is not ready. This means the bootROM is able to read out the BOOT.BIN file with the fsbl within in, but when the fsbl goes to do the same thing it cannot.

Have you found a workaround to this issue?

Today I will be booting from flash, and I will see if a booted OS can read a filesystem on the SD card.

Thanks in advance

JH

Hi,

Can you send this part and the B2B connector part of your schematics to support@trenz-electronic.de?

Can you also check the connection again? Maybe bad solder joint. BootROM, FSBL, Uboot and Linux will initialise SD separately and use different configuration
You can also try to Start FSBL debugger and where exactly is the problem. --> In this case you must change some compiler setting, see point for in https://wiki.trenz-electronic.de/display/PD/MPSoC+Debug

br
John

luca_osrf

Hi,

We didn't solve the problem yet, it is quite hard to reproduce on our prototype (i.e. works 50% of the time, when it doesn't power cycling will likely fix it), we are considering the same option of writing the BOOT.bin file to the QSPI flash to "workaround" the issue, possibly even writing our rootfs on the eMMC.
When I have some time I'll try to debug the FSBL as you recommended.

/Luca

JH

Hi,
I will check the schematics and come back to you later.
br
John

luca_osrf

Hi,

I'm pasting here the comments that John had on the design, hoping that they help other people in the Interwebs!
It turns out the mistake we did was connecting the MIO pins straight to the SD card, I assumed there would be no need of level shifting (like it is done in the TE0703 board) because the voltage banks of the TE0820 are already at 3.3V.

It turns out, the level shifter has additional features, namely internal pullups that are needed for some of the lines, recommendation on values and connections can be found on the Zynq Ultrascale+ PCB design guide https://www.xilinx.com/support/documentation/user_guides/ug583-ultrascale-pcb-design.pdf under SDIO design.

John still recommended using the level shifter even if it performs no shifting (input 3.3 output 3.3) since it implements the internal pullups.

We will try these fixes on our next revisions but it seems like a good lead and maybe you went through the same thought process that caused a similar mistake?

John please correct me if I'm wrong in any part.

Cheers!
/Luca

JH

Hi Luca,
so basically it's correct, but I will add some more notes:

If you connect directly, you should follow recommendations from Xilinx on UG583 page 188ff chapter SD/SDIO.
-->Add 30Ohm series resistor close to MIO, ad 10kOhm pullup ...

-> Series resistors are not add on the module to have MIOs free available also for other interface . So close to MIO will be in this case close to B2B.
-> We used TXS02612RTWR as level shifter and this IC has internal pullups, so external pullups like Xilinx recommenced are not needed with TXS02612RTWR .

We used TXS02612RTWR on our 4x5 carrier (used with 7 Series Zynq and UltraScale+ Zynq) and also on our TEBF0808 carrier (Carrier for other UltraScale+ Zynq series) without series resistor (it's connected like described in the TXS02612RTWR datasheet). We didn't detect any problems with this combination.

On the next 4x5 Carrier PCB update, we will add variable VCC for B2B side of the levelshifter side to support 3.3V and 1.8V MIO completely (all or 7 Series Zynq was MIO Bank 1.8V, that is the reason, why this side on the 4x5 carrier is fix 1.8V at the moment).

So as summary, I would recommend to use levelshifter to be on the safe side.

PS: Our schematics are available on the download area (and also Altium projects of some carriers), you can use it to design your own carrier.

br
John