Author Topic: TE0820 MIO GPIO  (Read 344 times)

jeff

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TE0820 MIO GPIO
« on: May 09, 2019, 07:16:31 PM »
I'm having trouble driving the MIO GPIO pins on a TE0820-4EV from linux. I have attached the GPIO settings from the PS configuration in Vivado, and have tried changing the I/O and pull resistor types without any difference in outcome. So, a few questions:

  • Am I correct in assuming that, for example, to use MIO26 from linux I need to export gpio338+26 = gpio364? I assume this is correct because I am successfully able to use EMIO starting at 338+78 = 416, and there are 78 MIO pins.
  • Is there any other configuration necessary in Vivado to use the MIO pins as GPIO, such as pin constraints? It seems like the IP configuration window should take care of that but maybe I'm missing something.

As an example of the behavior I'm seeing, here's a script I'm using to interact with GPIO:

Code: [Select]
#!/bin/sh
# Usage: ./gpio.sh pin_number in|out [value]

# Get gpio pin number, using gpiochip338 as base
let d=338+$1

# Export gpio pin if necessary
[ -d /sys/class/gpio/gpio$d ] || echo $d > /sys/class/gpio/export

# Set in/out direction
echo $2 > /sys/class/gpio/gpio$d/direction

# Set value if provided
[ "$#" -ge "3" ] && echo $3 > /sys/class/gpio/gpio$d/value

# Print current value to stdout
printf "gpio%d == %d\n" $d $(cat /sys/class/gpio/gpio$d/value)

And here are the results I'm seeing for MIO32:

Code: [Select]
root:~# ./gpio.sh 32 out 0
gpio370 == 1
root:~# ./gpio.sh 32 out 1
gpio370 == 1

We run MIO32 on our custom carrier board directly to an IC and include a 49.9k pulldown. If I measure at the resistor, I see ~1.4v, which seems especially strange since I haven't changed the bank1 voltage reference from LVCMOS33 as specified in the TE0820-4EV example design. I have a TE0705 that I will be able to test with to ensure it's not just an issue with our custom board, but it's loaned out at the moment and I won't have access to it for a while. In the meantime, I was wondering if anyone here has run into this issue and, if so, how they were able to solve it.

Thanks in advance!

jeff

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Re: TE0820 MIO GPIO
« Reply #1 on: May 09, 2019, 09:27:21 PM »
Update: I managed to have someone test on my TE0705 and they are seeing very similar behavior. They were able to use MIO32 as an input and it reads correctly, but it does not work as an output.

JH

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Re: TE0820 MIO GPIO
« Reply #2 on: May 10, 2019, 11:34:20 AM »
Hi,
you must select the MIO GPIO on Vivado ZynqMP IP an export new HDF.

Xilinx has also some description here:
https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842398/Linux+GPIO+Driver

br
John

jeff

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Re: TE0820 MIO GPIO
« Reply #3 on: May 10, 2019, 03:44:11 PM »
Hi John,

Thanks for the quick response. Are you talking about the MPSoC IP block configuration page? If so, I believe that's already done – I attached a screen capture of my current settings for the pins I'm trying to use on my original post. Or is there some other configuration in Vivado that I need to look at?

JH

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Re: TE0820 MIO GPIO
« Reply #4 on: May 13, 2019, 02:32:47 PM »
Hi,
yes this GPIO from your screenshot.  Did you generate your petalinux with the exported HDF from this project? Can you check if the device tree entry for gpio was add automatically?
Can you send me the outputs of the different commands in linux?
It's much easier to help if I see all inputs/outputs instead of only your script with some parameters...

Did you try to use the MIO as input instead as output to check if the values, which is read by zynmp ok?
Did you also measured the MIO Pin? Maybe what your read back on the "value" entry is not what you set there (depends on the direction setting).

Which Vivado/SDK/Petalinux version did you use?

br
John

jeff

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Re: TE0820 MIO GPIO
« Reply #5 on: May 13, 2019, 04:11:17 PM »
I built petalinux 2018.2 based on the exported HDF (from Vivado/SDK 2018.2) and have verified that gpio does exist in the device tree at the correct address (0xff0a0000). Additionally, the GPIO registers do seem to be modified as expected while using the sysfs interface. And the GPIO pins do function correctly as an input: I am able to export the pins, set the direction, and read the value through sysfs and see that, e.g., a pin pulled high reads 1 until I pull the signal to ground, when it reads 0. Here's a quick demonstration using only sysfs:

Code: [Select]
root:~# echo 370 > /sys/class/gpio/export
# Test for successful export
root:~# ls -d /sys/class/gpio/gpio370/
/sys/class/gpio/gpio370/
root:~# echo in > /sys/class/gpio/gpio370/direction
# [TE0705 pin J1-9 measures 3.3v]
root:~# cat /sys/class/gpio/gpio370/value
1
# [J1-9 is shorted to ground]
root:~# cat /sys/class/gpio/gpio370/value
0
root:~# echo out > /sys/class/gpio/gpio370/direction
root:~# echo 0 > /sys/class/gpio/gpio370/value
root:~# cat /sys/class/gpio/gpio370/direction
out
# [J1-9 jumper to ground has been removed, again measures 3.3v]
root:~# cat /sys/class/gpio/gpio370/value
1

JH

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Re: TE0820 MIO GPIO
« Reply #6 on: May 14, 2019, 12:54:25 PM »
Hi,
so use it as input seems to work, but not if you use it as output.
What did you measured on the Pin J1-9 when set the output to high and to low?
br
John

jeff

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Re: TE0820 MIO GPIO
« Reply #7 on: June 10, 2019, 09:43:39 PM »
The issue turned out to be that the FSBL needed to be rebuilt against an updated BSP...

JH

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Re: TE0820 MIO GPIO
« Reply #8 on: June 11, 2019, 07:40:36 AM »
Hi,
Quote
The issue turned out to be that the FSBL needed to be rebuilt against an updated BSP...
You must always regenerate all files, if you change something on PS interfaces...FSBL configures PS with the setup given by the HDF files (from your vivado PS IP)
Thanks for your feedback and good to hear the it works now.
br
John