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TE0803 FSBL 2018.3 with Petalinux

Started by ziladdev, April 02, 2019, 12:58:14 PM

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ziladdev

Hi Trenz.

We understand that in order to have the GT lanes working we need to use the modified FSBL to make sure the peripherals are getting the correct clocks.

We are currently using vivado 2018.3 and we would like to have the step of FSBL building taken care of by a bitbake patch recipe.

In order to do that, we downloaded the fsbl from Xilinx for 2018.3 and diff the Trenz's FSBL code from the StarterKit (2018.2). The patch is then deployed with fsbl_%.bbappend :
# Patch for FSBL

do_configure() {
    if [ -d "${S}/patches" ]; then
       rm -rf ${S}/patches
    fi

    if [ -d "${S}/.pc" ]; then
       rm -rf ${S}/.pc
    fi
}

SRC_URI_append = " \
file://0001-trenz-fsbl.patch \
        "

FILESEXTRAPATHS_prepend := "${THISDIR}/files:"

EXTERNALXSCTSRC = ""
EXTERNALXSCTSRC_BUILD = ""


This doesn't work and results in errors see below:
| DEBUG: Executing shell function do_compile
| /path-to-project/build/tmp/work/plnx_zynqmp-xilinx-linux/fsbl/2018.3+gitAUTOINC+56f3da2afb-r0/temp/run.do_compile.25810: line 109: cd: /path-to-project/build/tmp/work/plnx_zynqmp-xilinx-linux/fsbl/2018.3+gitAUTOINC+56f3da2afb-r0/build/fsbl: No such file or directory


Questions:
- Do you have an example .bbappend file to use for FSBL patching?
- It is possible that we have version mismatch between 2018.2 and 2018.3. Do you have an update of the FSBL code to the latest vivado version (2018.3) for the starterkit.
- What do you recommend to use ? FSBL through bitbake recipes or "external" compilation of FSBL ?

Thanks in advance for your answers and help!

Anisse


JH

#1
Hi,

we use SDK to generate FSBL. There is a template included into the reference design, which can be loaded as local repository into SDK or used with HSI:
We never tried out patch functionality of petalinux for FSBL, so I can't help with this topic. Put it seems that this path was not found:
/path-to-project/build/tmp/work/plnx_zynqmp-xilinx-linux/fsbl/2018.3+gitAUTOINC+56f3da2afb-r0/build/fsbl
--> so maybe some FSBL sources was not generated.


All changes we have done on FSBL are marked with the comment "TE MOD", files and change list, see:
Add only our changes to the 2018.3 FSBL code from Xilinx.

I work currently on 2018.3 update with rework of the FSBL and a new TEBF0808 CPLD Firmware. I think I will upload new design during the next 2 weeks.



br
John