programming TE0720 through TE0701

[dman]

Hi,
so i am trying to program the flash, and i cant.
i am not sure if i should change dip switches mode... i am a bit confused.

programing FPGA normaly (through vivado ot through sdk) works (at least no error there)
but when i try to program the flash i get the following message:

available targets and devices:
Target 0 : jsn-JTAG-ONB4-2516330015DCA
Device 0: JSN-
TARGET 1: JSN-dlc10-
error: failed to open target cable node 330429984 on tcp:127.0.0.1

[JH]

Hi,

flash programming is also done over JTAG with the xilinx tools, if you can program SoC, flash should be also works.

With Vivado 2017.3 and newer, you need to add a special FSBL on the GUI(this is only for the GUI, not for boot.bin), to program Flash (but this should create another error message, later if you didn't do this), we provide this in our reference design:

• https://wiki.trenz-electronic.de/display/PD/TE0720+Test+Board

Is something running on the SoC?
Which vivado version did you use? Which Flash device did you set on Vivado to program flash?
Did you try another USB Port on your PC or other USB cable?
If you close Xilinx tools and "hw_server.exe" is still running, than kill this manually on Win Task manager and try again.

br
John

[dman]

First, thanks for the answers.
What dobyou mean which flash i set on vivado?
I usualy set the flash family thtough the sdk...

I use vivado 2015.4 for some legacy reasons and prefer to continue using it this point

A few things:
I manage to program the fpga through vivado.
I managed to program the fpga through the sdk
I managed to program the arm through the sdk, but then it stopped.
Cant program the flash through the sdk.

The som has a fast blinking red light mode that i assum came with a factory program.
No sd card is installed on the carrier board.

The switches are set as follow:
1 on
2 on
3 off
4off

I tried other combinations, didnt get better results and from my understandings, these are the modes i need.

Would gladly ask for some other insights.

[dman]

update,
managed to program the flash through vivado as suggested (still don't know why i cant through sdk program)

another question: i try to program through standard JTAG: i.e. xilinx "platform cable usb 2" and connecting the appropriate signals to the board in the carrier J15 connector (TRI, TDO, TCK, GND and vref) , the vivado recognizes hardware target but doesn't recognize any hardware devices... why?

[JH]

Hi,
it isn't JTAG interface. You can use J15 for PJTAG over EMIO on TE0720, when your start design with PJTAG over PL to the correct pin.

What did you do exactly on SDK?

br
John

[JH]

Hi,
I add the older one here:
https://wiki.trenz-electronic.de/display/PD/TE0720+CPLD
the basics are the same like on the current one. CPLD Description for current version is on the TODO list.
br
John

[dman]

thanks.
so the situation is as follow:
succeeded to program using te0701 carrier board. also through the sdk.

cant program using my custom carrier board.
in my custom carrier board i did the following:
connected all TDI,TDO,TCK,TMS VCC,GND to a header so i can connect my platform cable usb 2 xilinx programmer.
connected EN1 - high
JTAGMODE - low

so i expect the CPLD to be transparent and be able to "see" the xilinx SOC. i dont...

[JH]

Hi,
how did you use/connected  the other control signals:

   
• https://wiki.trenz-electronic.de/display/PD/4+x+5+SoM+Integration+Guide#id-4x5SoMIntegrationGuide-4x5ModuleControllerIOs

How did you enable/source variable bank powers? Did you used on board voltage or external

   
• https://wiki.trenz-electronic.de/display/PD/TE0720+TRM#TE0720TRM-BankVoltages

Especially B34

Check TDI/TDO, maybe they must swapped?

   
• https://wiki.trenz-electronic.de/display/PD/4+x+5+SoM+Integration+Guide
• see pictures "power and group pin assignment"

brJohn

[dman]

regarding cpld on som, is there a source code?

regarding your questions:

JTAGSEL - low
SC_EN1 - high
SC_NOSEQ - low
SC_PGOOD - output  dont care
SC_BOOTMODE - high
SC_nRST - high

voltages:
vccio35 - 1.8v
vccio34 - 2.5v
vccio33 - 2.5v
vccio13 - 3.3v

JTAG VREF=3.3v
tdi tdo look ok

[JH]

Hi,
this seems to be Ok.
CPLD sources are not available for TE0720.

What is the Status of the LEDs?

• https://wiki.trenz-electronic.de/display/PD/TE0720+CPLD#TE0720CPLD-LEDStatusCodes

Does the system boot when you program Flash with design on TE0701 and start the module on your board?

Can you send me the part of your B2B schematics to support@trenz-electronic.de ?

Can you check if all JTAG signals are connected between your JTAG connector and the B2B connector?


PS: Your Bank voltages will be enabled after core voltages are enabled? So you use Output voltages from the module or you enable your power regulators with this voltages? This should be no effect of your JTAG problem, but it's not good for FPGA if you didn't do this power sequencing.

• https://www.xilinx.com/support/answers/50802.html
• https://www.xilinx.com/support/answers/37347.html
• https://www.xilinx.com/support/documentation/data_sheets/ds187-XC7Z010-XC7Z020-Data-Sheet.pdf

br
John

[dman]

Ok, so here is an update: problem solved.
Seems that one of my connectors wasnt solder properly so not all signals reached the som as they should.

So first, thank you very much for your help!

What brings me for a few more questions, now that the vivado identifies the xilinx fpga:
1. I am unable to debug the som. Is there a document like assembly drawings? So i can id the test points, for example, on the som?
2. I didnt quite understand how can i program the leds on the som without programming the cpld.
For example, i dont want the constantly blinking red led indicating qspi flash mode.
3. It seems that on the carrier te0701 the ftdi eeprom was erased as i  didnt notice the warning of using my own ftdi.
Is there any solution to that?

Thanks.

[JH]

Hi,
1. AD and schematics are available on the download area. What is exactly the problem?
2. You must CPLD MII interface to the CPLD register, content can be changed via special FSBL (see source code) or uboot, https://wiki.trenz-electronic.de/display/PD/TE0720+CPLD#TE0720CPLD-SCFirmwarever0.02
3. You can write a email to support@trenz-electronic.de and we can do it here (You'll have to pay for it.). You can also try out https://forum.digilentinc.com/topic/1816-digilent-smt1-recovery/ , but I can't help with this link, you must try out by yourself on your own risk.

br
John

[dman]

Hi,
regarding 1:
i want to debug my fpga and i dont know to which pin, each testpoint is connected.
it is extremely difficult to debug this way.

i couldn't find any document showing on board where is every TP
would be glad to get a link to such a document

[JH]

Hi,
which signal did you want to debug?
What's your problem?
br
John

[dman]

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