Author Topic: Te0720 DDR+microblaze  (Read 388 times)

SF

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Te0720 DDR+microblaze
« on: February 13, 2019, 02:11:40 PM »
Dear all,
I am trying to puild petalinux for microblze but i need DDR .i am not using ARM Cortex-A9.
I tried with mig but i can not find any constraints of DDS. i dont know if DDR is only connected to PS or I can use it also im PL with Te0720 bead.
any suggestion please.
LG

Oleksandr Kiyenko

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Re: Te0720 DDR+microblaze
« Reply #1 on: February 13, 2019, 03:00:27 PM »
Hello,

You can access DDR memory from PL. To do that you need to Add Zynq PS block to your project, in this block you need to enable DDR interface and one or more of AXI HP interfaces.
This interface is memory mapped and you can access DDR. As a software part, you need only FSBL.

Best regards
Oleksandr Kiyenko

JH

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Re: Te0720 DDR+microblaze
« Reply #2 on: February 13, 2019, 03:03:18 PM »
Hi,
DDR is connected on PS, so PS is needed to initialised DDR.
DDR is accessible from PL over AXI.
See:

I think what you request is:

br
John

SF

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Re: Te0720 DDR+microblaze
« Reply #3 on: February 13, 2019, 03:12:23 PM »
thank u so much for relpy,
i know i can access it from PS but problem is my project its only in PL
i used Memory inetrface generator to access DDR without PS but it sems there is some problem with the clock .
LG

JH

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Re: Te0720 DDR+microblaze
« Reply #4 on: February 13, 2019, 03:16:05 PM »
Hi,
did you checked the xilinx link, i've send you?
br
John

SF

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Re: Te0720 DDR+microblaze
« Reply #5 on: February 13, 2019, 03:27:51 PM »
Hi John ,
yes i did but they used microblaze + Zynq Processing system.
I need to use onl microblze because of some safety requirement of my project .
do u have any suggestion please
LG

JH

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Re: Te0720 DDR+microblaze
« Reply #6 on: February 13, 2019, 03:30:45 PM »
Hi,
not possible on TE0720 with Zynq and DDR connected on PS. For this combination you must use  the why like Xilinx has described.
In case you want only FPGA, change module, for example  TE0712:

br
John

SF

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Re: Te0720 DDR+microblaze
« Reply #7 on: February 13, 2019, 03:42:42 PM »
I see thank u so mach for ur help
LG

Antti Lukats

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Re: Te0720 DDR+microblaze
« Reply #8 on: March 08, 2019, 11:27:45 AM »
Hi SF,

to make it really CLEAR:

you can use DDR with Microblaze (or any other soft CPU), and you do not need to use the PS CPU in your project. This is possible.

But in this case you should consider the PS as "black box that includes DDR controller", so you let the PS to start and initialize the DDR and expose the DDR to the PL. Then you STOP the PS CPU. It would not do anything in your design.

But if you want to use ZYNQ with PS DISABLED, then this is not possible per Xilinx, as Zynq FPGA has not BOOT interface, booting is always done by the PS CPU. This is Xilinx concept, all other soms with Zynq from any other vendor would have same behaviour. FGPA on ZYNQ can not boot all by itself.