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how to flash the SPI of TE0803-02-04CG-1EA/TE0803-02-04CG-1EB

Started by dawnpaul, March 05, 2019, 02:14:24 PM

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dawnpaul

Hi,
How to built a Petalinux image for TE0803-02-04CG-1EA/TE0803-02-04CG-1EB board and pragram the SPI flash with JTAG.

JH

Hi,
we have a reference design with description available:
General references to Xilinx documentation for flash programming:

General notes and reference for petalinux creation:
brJohn

dawnpaul

Hi
We are able to flash the qspi and boot the board. But when we change the bitfile the module hangs. Does the bitfile has any dependency on the Linux boot. How this could be identified

JH

Hi,
did you use AXI interface between PS-PL in your design? If linux try to get access during the time you reprogram the PL, it will freeze.
br
John

dawnpaul

Hi
We are not using  axi interface in our design between the PS and PL. It's a pl only design. Bit file is loaded and Linux stuck at the end of booting. No panic prints are there.

end of boot log
   1.809235] Bluetooth: HIDP socket layer initialized
[    1.809334] 9pnet: Installing 9P2000 support
[    1.809354] Key type dns_resolver registered
[    1.809668] registered taskstats version 1
[    1.809970] Btrfs loaded, crc32c=crc32c-generic
[    1.814933] ff000000.serial: ttyPS0 at MMIO 0xff000000 (irq = 35, base_baud = 6249999) is a xuartps
[    3.270977] console [ttyPS0] enabled
[    3.276138] rtc_zynqmp ffa60000.rtc: setting system clock to 1970-01-01 00:00:05 UTC (5)
[    3.284257] clk: Not disabling unused clocks
[    3.288469] ALSA device list:
[    3.291386]   No soundcards found.


JH

Hi,
did you use prebuilt linux of our reference design? If you change something you must create your own one linux it's only an example.

Part of the audio is connected over PL, see attachment screenshot. You must disable and regenerate all.

br
John

dawnpaul

We are not using the reference design. We created a new petalinux project. Only modification done is change of boot partition size of flash to  0x1e00000. This is done with petalinux-config. Current vivado design only contain PL logic block. Should we add the ZynqMP block also. We are planned to add  zynqMP to the vivado design and create an hdf with that. Also should we disable all the drivers in kernel if we not using it. Like if the sound card is not present in the Vivado design should we remove it in kernel config.

JH

Hi,
when you use vivado project without PS and you create new petalinux project, which HDF did you use for petalinux?
br
John

dawnpaul

We used HDF exported from the Vivado design which has only PL block

JH

i'm wondering that linux is ever created in this case.

Configuration from Vivado PS-IP defines how PS part works. So without this information, petalinux don't know which periphery is used on the PS. Maybe it used some default values, but this will be definitive wrong.
br
John

dawnpaul

We have started a new vivado build with zunqMP block. Hope this would resolve the issue. Will update after testing it

JH

Hi,
zynqMP Block must have correct configuration.
we provide board parts with minimum setup (basic configuration of QSPI, Bank power and DDR) or for the starterkit design(basic TEBF0808 periphery). PS periphery configuration depends on your carrier.

br
John

dawnpaul

Hi John,
Thanks for the support. We changed the hardware configuration of zinqMP in vivado and used the exported hdf in petalinux. Currently we are able to boot the board with PL programmed.