Trenz Electronic FPGA Modules

Vivado 2017.1?

Started by andax

Replies: 1
Views: 4,832

April 25, 2017, 12:05:29 PM
by JH

Vivado 2020.2 board files directory

Started by bigguiness

Replies: 5
Views: 5,714

January 17, 2023, 08:15:23 PM
by bigguiness

Vivado and Petalinux RELEASE POLICY

Started by Antti Lukats

Replies: 0
Views: 5,730

October 27, 2014, 05:34:50 PM
by Antti Lukats

Vivado and Xilinx sdk Tutorial/Project for TE0720.

Started by Hammad

Replies: 33
Views: 27,982

June 15, 2016, 07:05:46 PM
by Antti Lukats

Vivado Board File for TE0714-03 FPGA Module

Started by Karim Damji

Replies: 3
Views: 3,821

November 09, 2021, 06:31:43 AM
by JH

Vivado Board Support, currently testing with 2014.4

Started by Antti Lukats

Replies: 0
Views: 5,947

November 22, 2014, 01:33:07 PM
by Antti Lukats

Vivado IP block ZYNQ7 PS is not GP MASTER AXI block for trenz TE0715 SOM

Started by stressed_coder

Replies: 2
Views: 4,930

January 05, 2023, 10:13:05 AM
by stressed_coder

Vivado Project Delivery

Started by IPodFan

Replies: 2
Views: 3,716

August 27, 2019, 01:06:12 PM
by IPodFan

Vivado synth error due to two IP cores having submodules with the same name

Started by Stonebull

Replies: 7
Views: 4,711

October 18, 2021, 07:26:03 AM
by JH

Vivado/Petalinux version

Started by shansen

Replies: 5
Views: 3,881

February 24, 2021, 06:22:55 AM
by JH

Vivado: "Invalid Placement Site" while assigning pins

Started by IPodFan

Replies: 4
Views: 9,744

August 28, 2019, 12:39:56 PM
by IPodFan

Vtis AI and XRT support

Started by pedrom

Replies: 1
Views: 3,303

January 20, 2020, 08:04:10 AM
by JH

Watchdog issue in Gigabee?

Started by public_id_thorax

Replies: 1
Views: 5,959

July 17, 2014, 11:36:22 AM
by Oleksandr Kiyenko

Weird HDMI ouput with filter module

Started by SoftwareProjekt

Replies: 3
Views: 4,891

August 14, 2017, 08:39:56 AM
by JH

what configuration interface for TE08XX?

Started by johnabel

Replies: 7
Views: 4,871

August 22, 2019, 03:00:33 PM
by JH

what gap filler to use?

Started by julesvo

Replies: 3
Views: 3,240

March 09, 2021, 11:49:27 AM
by julesvo

What is P2 in TEBF0808 connected to?

Started by johnabel

Replies: 1
Views: 3,328

February 05, 2020, 12:46:45 PM
by JH

when creating bitstream for TE0300_v1.0.1.2 error is coming

Started by pv1984

Replies: 4
Views: 15,043

August 26, 2010, 09:57:55 AM
by Horsa

where can I download TE0720-02-refplnx.bsp for my PetaLinux project

Started by jein

Replies: 4
Views: 5,855

August 29, 2016, 09:12:44 AM
by JH

Where is fsbl_hooks.c with uboot shared memory code?

Started by Steven Renich

Replies: 4
Views: 6,485

April 08, 2016, 11:29:27 AM
by Antti Lukats

where to find the 16 hdmi data pins (te0726-03m)

Started by lyding

Replies: 4
Views: 4,653

August 22, 2018, 04:16:37 PM
by lyding

Whether CAN Transceiver available for TE0720-02-CR

Started by Karikalan

Replies: 2
Views: 8,610

November 28, 2017, 02:57:45 PM
by Karikalan

why are the TE0720 CPLD I2C to GPIO blocks bound to "ti,pcf8574"

Started by bigguiness

Replies: 1
Views: 4,785

February 02, 2023, 01:17:38 PM
by JH

Why JM1 connector signal pin 84 tied to ground on TE0715-03-30 FPGA board?

Started by os

Replies: 2
Views: 5,292

December 03, 2015, 02:15:33 PM
by os

why no /dev/mtd or working USB under petalinux 2016.2 on TE0720-03-2IF?

Started by danwwright

Replies: 12
Views: 15,695

February 23, 2018, 08:09:43 AM
by Oleksandr Kiyenko

will TE0720 pins do well LVDS (400Mhz bit clock)

Started by hopefly

Replies: 1
Views: 4,762

April 10, 2018, 10:18:56 AM
by JH

Windows cannot detect TE0703 - Carrier board

Started by dbayoxy

Replies: 21
Views: 5,230

May 13, 2020, 06:27:35 AM
by JH

wiring USB mouse and USB keyboard to FPGA Systems

Started by martinius

Replies: 4
Views: 8,313

June 13, 2018, 08:11:19 AM
by JH

XADC with Zynqberry TE0726

Started by pb

Replies: 4
Views: 5,409

June 23, 2017, 08:31:49 AM
by pb

xapp1078 (cpu1 bare metal, cpu0 linux) on TE0720 Linux crash on cpu1 start

Started by bgrissom

Replies: 2
Views: 6,231

August 29, 2015, 11:10:26 AM
by Antti Lukats

xapp1078 (cpu1 bare metal, cpu0 linux) on TE0745 Zynq proc. system7 properties

Started by sabankocal

Replies: 5
Views: 4,115

August 14, 2019, 10:31:24 AM
by sabankocal

XC7Z010 PS CAN baud rate config

Started by javier.reyes.g

Replies: 2
Views: 8,392

March 31, 2018, 06:25:03 PM
by javier.reyes.g

Xilinx Artix-7 XC7A200T-2FBG484I ADC functionality

Started by Varun

Replies: 2
Views: 5,196

April 30, 2018, 03:24:34 PM
by Varun

Xilinx Board Description file (*.xbd2) for GigaBee XCSLX (UM-TE0600)

Started by GuinnessTrinker

Replies: 4
Views: 10,655

April 09, 2012, 07:15:21 PM
by reLinux

Xmod FTDI JTAG Adapter: Why the clock speed limit?

Started by offroad

Replies: 4
Views: 5,563

January 30, 2017, 05:40:44 PM
by Antti Lukats

XMOD FTDI JTAG cannot connect to target

Started by johnabel

Replies: 5
Views: 4,551

August 16, 2019, 12:47:52 PM
by johnabel

XMOD FTDI JTAG vs Platform Cable USB II

Started by joniengr

Replies: 1
Views: 4,488

November 12, 2018, 12:30:36 PM
by JH

XMOD Unknow device issue TE0841-02Som,TEBA0841-02 and XMOD TE0790-03

Started by srg

Replies: 2
Views: 3,498

August 21, 2020, 08:42:02 AM
by srg

XPS_NPI_DMA questions

Started by mfa

Replies: 3
Views: 14,282

December 10, 2010, 11:20:36 PM
by Ales Gorkic

Yocto support for TE0715

Started by random

Replies: 4
Views: 5,595

March 15, 2017, 04:16:14 PM
by random

ZX Spetrum in MAX1000

Started by Subcritical

Replies: 0
Views: 4,069

February 22, 2024, 05:46:02 AM
by Subcritical

ZyncBerryZero Camera reference design not working

Started by sthibault

Replies: 1
Views: 3,227

April 14, 2021, 12:18:21 AM
by sthibault

zynq encrypted bitstream

Started by skorolcz

Replies: 1
Views: 3,457

January 06, 2020, 10:00:30 AM
by JH

Zynq Module as USB host front end for digital circuit

Started by martinius

Replies: 1
Views: 4,690

January 23, 2017, 08:32:24 AM
by Oleksandr Kiyenko

Zynq pin electrical risk assesment

Started by carles.perello

Replies: 1
Views: 5,091

February 28, 2023, 02:12:53 PM
by JH

Zynq Starter Kit (TE0720-03 + TE0703-06) Voltage

Started by mischn

Replies: 7
Views: 3,878

September 01, 2021, 02:59:25 PM
by JH

Zynq write to DDR RAM from FPGA Logic

Started by chris_est

Replies: 5
Views: 9,363

January 10, 2017, 07:24:41 PM
by JS

Zynq-7100 BSP

Started by mishuk

Replies: 4
Views: 9,515

November 02, 2017, 12:40:21 PM
by mishuk

ZynqBerry

Started by sebo

Replies: 12
Views: 7,986

November 14, 2016, 04:20:35 PM
by JH

Zynqberry 2

Started by Brad Taylor

Replies: 0
Views: 4,558

April 06, 2017, 07:26:11 AM
by Brad Taylor